Added cocotb testbench for mux4to1 #18
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| name: Verilog Simulation | |
| on: | |
| push: | |
| branches: | |
| - master | |
| paths-ignore: | |
| - "out/**" | |
| - "resources/**" | |
| - ".gitignore" | |
| - "chn" | |
| - "README.md" | |
| pull_request: | |
| branches: | |
| - master | |
| paths-ignore: | |
| - "out/**" | |
| - "resources/**" | |
| - ".gitignore" | |
| - "chn" | |
| - "README.md" | |
| jobs: | |
| build: | |
| runs-on: ubuntu-latest | |
| steps: | |
| - name: Checkout code | |
| uses: actions/checkout@v2 | |
| - name: Set up Icarus Verilog | |
| run: sudo apt-get -y install iverilog | |
| - name: Build and run Verilog simulation | |
| working-directory: testbench/rtl_tb # Subsequent step will back to root directory automatically | |
| run: | |
| make -f Makefile all | |
| - name: Clean up | |
| working-directory: testbench/rtl_tb | |
| run: | |
| make -f Makefile clean |