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Update documentation
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actions-user committed Apr 16, 2024
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20 changes: 10 additions & 10 deletions User-Manual/Plugins/Neuropixels-PXI.html
Original file line number Diff line number Diff line change
Expand Up @@ -774,45 +774,45 @@ <h2>Built-in self tests<a class="headerlink" href="#built-in-self-tests" title="
<tbody>
<tr class="row-even"><td><p>Test probe signal</p></td>
<td><p>30 s</p></td>
<td><p>Analyzes if the probe performance falls within a specified tolerance range, based on a signal generated by the headstage</p></td>
<td><p>Analyzes if the probe performance falls within a specified tolerance range, based on a signal generated by the headstage. Probes that are fully functional can still fail this test, so it’s not a definitive indicator of probe health.</p></td>
</tr>
<tr class="row-odd"><td><p>Test probe noise</p></td>
<td><p>30 s</p></td>
<td><p>Calculates probe noise levels when electrode inputs are shorted to ground</p></td>
<td><p>Calculates probe noise levels when electrode inputs are shorted to ground. Similar to the probe signal test, this test is not a definitive indicator of probe health, so failures can be safely ignored.</p></td>
</tr>
<tr class="row-even"><td><p>Test PSB bus</p></td>
<td><p>&lt;1 s</p></td>
<td><p>Verifies whether signals are transmitted accurately to the headstage</p></td>
<td><p>Verifies whether signals are transmitted accurately to the headstage via the parallel serial bus. If this test fails, it usually indicates that the probe is not properly seated in the headstage.</p></td>
</tr>
<tr class="row-odd"><td><p>Test shift registers</p></td>
<td><p>1 s</p></td>
<td><p>Verifies the functionality of the shank and base shift registers</p></td>
<td><p>Verifies the functionality of the shank and base shift registers. If this test fails, it means the probe electronics have become critically damaged. Even if data is being transmitted, there’s a possibility that it may be corrupted.</p></td>
</tr>
<tr class="row-even"><td><p>Test EEPROM</p></td>
<td><p>1 s</p></td>
<td><p>Tests the EEPROM memory storage on the flex, headstage, and BSC</p></td>
<td><p>Tests the EEPROM memory storage on the flex, headstage, and BSC.</p></td>
</tr>
<tr class="row-odd"><td><p>Test I2C</p></td>
<td><p>&lt;1 s</p></td>
<td><p>Verifies the functionality of the I2C memory map</p></td>
<td><p>Verifies the functionality of the probe’s I2C interface. This interface must be intact for proper functioning of the probe.</p></td>
</tr>
<tr class="row-even"><td><p>Test Serdes</p></td>
<td><p>&lt;1 s</p></td>
<td><p>Tests the integrity of the serial communication over the probe cable</p></td>
<td><p>Tests the integrity of the serial communication over the probe cable.</p></td>
</tr>
<tr class="row-odd"><td><p>Test Heartbeat</p></td>
<td><p>3 s</p></td>
<td><p>Tests whether the heartbeat signal between the headstage and BSC is working properly</p></td>
<td><p>Checks for a 1 Hz heartbeat signal between the headstage and BSC. This test indicates whether basic communication between the headstage and basestation is working.</p></td>
</tr>
<tr class="row-even"><td><p>Test Basestation</p></td>
<td><p>&lt;1 s</p></td>
<td><p>Tests the BSC board</p></td>
<td><p>Tests the connectivity between the computer and the basestation FPGA board via the PXIe interface.</p></td>
</tr>
</tbody>
</table>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>If the “probe signal” and “probe noise” tests fail, it does not necessarily indicate that the probe is broken. If your probe is successfully transmitting data, the outcome of these tests can be ignored.</p>
<p>If the “probe signal” and “probe noise” tests fail, it does not necessarily indicate that the probe is broken. If your probe is successfully transmitting data, the outcome of all of these tests (except the shift register test) can be safely ignored.</p>
</div>
</section>
<section id="headstage-tests">
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22 changes: 11 additions & 11 deletions _sources/User-Manual/Plugins/Neuropixels-PXI.rst.txt
Original file line number Diff line number Diff line change
Expand Up @@ -270,17 +270,17 @@ To run each test, select one from the drop-down menu, and click the "RUN" button
:header: "Name", "Duration", "Purpose"
:widths: 20, 20, 70

"Test probe signal", "30 s", "Analyzes if the probe performance falls within a specified tolerance range, based on a signal generated by the headstage"
"Test probe noise", "30 s", "Calculates probe noise levels when electrode inputs are shorted to ground"
"Test PSB bus", "<1 s", "Verifies whether signals are transmitted accurately to the headstage"
"Test shift registers", "1 s", "Verifies the functionality of the shank and base shift registers"
"Test EEPROM", "1 s", "Tests the EEPROM memory storage on the flex, headstage, and BSC"
"Test I2C", "<1 s", "Verifies the functionality of the I2C memory map"
"Test Serdes", "<1 s", "Tests the integrity of the serial communication over the probe cable"
"Test Heartbeat", "3 s", "Tests whether the heartbeat signal between the headstage and BSC is working properly"
"Test Basestation", "<1 s", "Tests the BSC board"

.. note:: If the "probe signal" and "probe noise" tests fail, it does not necessarily indicate that the probe is broken. If your probe is successfully transmitting data, the outcome of these tests can be ignored.
"Test probe signal", "30 s", "Analyzes if the probe performance falls within a specified tolerance range, based on a signal generated by the headstage. Probes that are fully functional can still fail this test, so it's not a definitive indicator of probe health."
"Test probe noise", "30 s", "Calculates probe noise levels when electrode inputs are shorted to ground. Similar to the probe signal test, this test is not a definitive indicator of probe health, so failures can be safely ignored."
"Test PSB bus", "<1 s", "Verifies whether signals are transmitted accurately to the headstage via the parallel serial bus. If this test fails, it usually indicates that the probe is not properly seated in the headstage."
"Test shift registers", "1 s", "Verifies the functionality of the shank and base shift registers. If this test fails, it means the probe electronics have become critically damaged. Even if data is being transmitted, there's a possibility that it may be corrupted."
"Test EEPROM", "1 s", "Tests the EEPROM memory storage on the flex, headstage, and BSC."
"Test I2C", "<1 s", "Verifies the functionality of the probe's I2C interface. This interface must be intact for proper functioning of the probe."
"Test Serdes", "<1 s", "Tests the integrity of the serial communication over the probe cable."
"Test Heartbeat", "3 s", "Checks for a 1 Hz heartbeat signal between the headstage and BSC. This test indicates whether basic communication between the headstage and basestation is working."
"Test Basestation", "<1 s", "Tests the connectivity between the computer and the basestation FPGA board via the PXIe interface."

.. note:: If the "probe signal" and "probe noise" tests fail, it does not necessarily indicate that the probe is broken. If your probe is successfully transmitting data, the outcome of all of these tests (except the shift register test) can be safely ignored.

Headstage tests
#################
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2 changes: 1 addition & 1 deletion searchindex.js

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