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Unified Power Format Demo (SystemVerilog and UPF)

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Name		Name	Last commit message	Last commit date
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doc		doc
src		src
.gitattributes		.gitattributes
.gitignore		.gitignore
README.md		README.md
run.do		run.do
wave.do		wave.do

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UPF-Demo

UPF (Unified Power Format) Demonstration Project in SystemVerilog + UPF for Mentor Graphics Questa. Documentation in Russian is available in doc/.

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Unified Power Format Demo (SystemVerilog and UPF)

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Stata 51.2%
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