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RFC: phy: restore operation at lower (50MHz) sys-clk-freq #33
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Following commit 15bc2db, LiteSDCard no longer works properly at the low end of system clock speeds (e.g., 50MHz). Reverting the way `self.ce` and `self.clk` are generated to `comb` instead of `sync`, allows LiteSDCard to operate at the full previous range of system clock speeds. Fixes: 15bc2db Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
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# Ensure we don't get short pulses on the SDCard Clk. | ||
ce_delayed = Signal() | ||
ce_latched = Signal() | ||
self.sync += If(clk_d, ce_delayed.eq(self.clk_en)) | ||
self.comb += If(clk_d, ce_latched.eq(self.clk_en)).Else(ce_latched.eq(ce_delayed)) | ||
self.sync += self.clk.eq(~clk & ce_latched) | ||
self.comb += self.clk.eq(~clk & ce_latched) |
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@enjoy-digital : I've understood and agree with all the rest of the changes in commits 1a3d474 and 15bc2db, but not sure why self.ce
and self.clk
were switched to sync
from the original comb
. It is the reason sdcard breaks at lower (50MHz) system clock frequencies.
To be honest, though, I also don't get why this change breaks sdcard at low speeds :)
@enjoy-digital : ping? |
Hi @gsomlo, sorry for the delay and thanks for investigating. The reason for the change was to improve the timings (enjoy-digital/litex#1814). I'll have a closer look at this. |
The weird thing is that if one switches |
Following commit 15bc2db, LiteSDCard no longer works properly at the low end of system clock speeds (e.g., 50MHz). Reverting the way
self.ce
andself.clk
are generated tocomb
instead ofsync
, allows LiteSDCard to operate at the full previous range of system clock speeds.Fixes: 15bc2db
tested on nexys_video with vexriscv at 50 and 100 MHz, and with rocket at 50MHz on the nexys_video and ecpix5.