Clock Tree Management in Crazyflie Firmware

[amitBLD]

Hi,

I am currently working on customizing the Crazyflie firmware and I have a question regarding the clock tree configuration of the STM32F405RGT6 microcontroller used in the Crazyflie.

Could you please provide some insight into where in the firmware the clock tree is managed and configured? Specifically, I'm looking to understand how the system clock, PLL, and other peripheral clocks are set up.

Any guidance or pointers to the relevant files or sections of the firmware would be greatly appreciated.

Thanks in advance!

[ataffanel]

As far as I can tell, the Crazyflie firmware is currently using the default clock setup code from ST:

• At startup, startup.s calls SystemInit(): https://github.com/bitcraze/crazyflie-firmware/blob/ac565120e6ca2858d2e4a73f204775502e2d7233/src/init/startup_stm32f40xx.S#L150
• SystemInit initialized all clock and is declared in the ST CMSIS lib: https://github.com/bitcraze/crazyflie-firmware/blob/ac565120e6ca2858d2e4a73f204775502e2d7233/src/lib/CMSIS/STM32F4xx/Source/system_stm32f4xx.c#L337

So if you are planning to play with the clocks, you can either copy the system file somewhere outside the cmsis folder and modify it, or modify the PLL setting after the firmware has booted.

[amitBLD]

@ataffanel Thanks

[amitBLD]

the information provided by @ataffanel is sufficient to understand the clock-tree management.