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cc2500_REG.h
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cc2500_REG.h
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/* Sync word qualifier mode = 30/32 sync word bits detected */
/* CRC autoflush = false */
/* Channel spacing = 199.951172 */
/* Data format = Normal mode */
/* Data rate = 2.39897 */
/* RX filter BW = 203.125000 */
/* Preamble count = 4 */
/* Whitening = false */
/* Address config = No address check */
/* Carrier frequency = 2432.999908 */
/* Device address = 0 */
/* TX power = 0 */
/* Manchester enable = false */
/* CRC enable = true */
/* Deviation = 38.085938 */
/* Packet length mode = Variable packet length mode. Packet length configured by the first byte after sync word */
/* Packet length = 255 */
/* Modulation format = 2-FSK */
/* Base frequency = 2432.999908 */
/* Modulated = true */
/* Channel number = 0 */
/* PA table */
#define PA_TABLE {0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,}
/***************************************************************
* SmartRF Studio(tm) Export
*
* Radio register settings specifed with C-code
* compatible #define statements.
*
* RF device: CC2500
*
***************************************************************/
#define REG_IOCFG2 0x0000
#define REG_IOCFG1 0x0001
#define REG_IOCFG0 0x0002
#define REG_FIFOTHR 0x0003
#define REG_SYNC1 0x0004
#define REG_SYNC0 0x0005
#define REG_PKTLEN 0x0006
#define REG_PKTCTRL1 0x0007
#define REG_PKTCTRL0 0x0008
#define REG_ADDR 0x0009
#define REG_CHANNR 0x000A
#define REG_FSCTRL1 0x000B
#define REG_FSCTRL0 0x000C
#define REG_FREQ2 0x000D
#define REG_FREQ1 0x000E
#define REG_FREQ0 0x000F
#define REG_MDMCFG4 0x0010
#define REG_MDMCFG3 0x0011
#define REG_MDMCFG2 0x0012
#define REG_MDMCFG1 0x0013
#define REG_MDMCFG0 0x0014
#define REG_DEVIATN 0x0015
#define REG_MCSM2 0x0016
#define REG_MCSM1 0x0017
#define REG_MCSM0 0x0018
#define REG_FOCCFG 0x0019
#define REG_BSCFG 0x001A
#define REG_AGCCTRL2 0x001B
#define REG_AGCCTRL1 0x001C
#define REG_AGCCTRL0 0x001D
#define REG_WOREVT1 0x001E
#define REG_WOREVT0 0x001F
#define REG_WORCTRL 0x0020
#define REG_FREND1 0x0021
#define REG_FREND0 0x0022
#define REG_FSCAL3 0x0023
#define REG_FSCAL2 0x0024
#define REG_FSCAL1 0x0025
#define REG_FSCAL0 0x0026
#define REG_RCCTRL1 0x0027
#define REG_RCCTRL0 0x0028
#define REG_FSTEST 0x0029
#define REG_PTEST 0x002A
#define REG_AGCTEST 0x002B
#define REG_TEST2 0x002C
#define REG_TEST1 0x002D
#define REG_TEST0 0x002E
#define REG_PARTNUM 0x0030
#define REG_VERSION 0x0031
#define REG_FREQEST 0x0032
#define REG_LQI 0x0033
#define REG_RSSI 0x0034
#define REG_MARCSTATE 0x0035
#define REG_WORTIME1 0x0036
#define REG_WORTIME0 0x0037
#define REG_PKTSTATUS 0x0038
#define REG_VCO_VC_DAC 0x0039
#define REG_TXBYTES 0x003A
#define REG_RXBYTES 0x003B
#define REG_RCCTRL1_STATUS 0x003C
#define REG_RCCTRL0_STATUS 0x003D