From f7962030249b61fd1517841efcb7fac329c1f7c9 Mon Sep 17 00:00:00 2001 From: Xinyu Lin Date: Sat, 2 Dec 2023 08:29:07 +0800 Subject: [PATCH] [Credo][Ycable] Correct the lane mapping in the debugdumpregister function for the 50G cable (#417) Signed-off-by: Xinyu --- sonic_y_cable/credo/y_cable_credo.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sonic_y_cable/credo/y_cable_credo.py b/sonic_y_cable/credo/y_cable_credo.py index 1bb4e04cb..e61a1003a 100644 --- a/sonic_y_cable/credo/y_cable_credo.py +++ b/sonic_y_cable/credo/y_cable_credo.py @@ -3254,7 +3254,10 @@ def debug_dump_registers(self, option=None): if api_ver >= 0x18: result['queue_info'] = self.queue_info() - lanes = [0,1,2,3,12,13,14,15,20,21,22,23] + if '1MS' in result['pn']: + lanes = [0,1,12,13,16,17] + else: + lanes = [0,1,2,3,12,13,14,15,20,21,22,23] for ln in list(lanes): data = self.get_serdes_params(ln)