diff --git a/.github/workflows/rtl_tb_test.yml b/.github/workflows/rtl_tb_test.yml
index b762079..35a1b53 100644
--- a/.github/workflows/rtl_tb_test.yml
+++ b/.github/workflows/rtl_tb_test.yml
@@ -22,10 +22,10 @@ jobs:
     - name: Build and run Verilog simulation
       working-directory: testbench/rtl_tb  # Subsequent step will back to root directory automatically  
       run: 
-        make -f makefile all
+        make -f Makefile all
 
 
     - name: Clean up
       working-directory: testbench/rtl_tb
       run:
-        make -f makefile clean
+        make -f Makefile clean
diff --git a/makefile b/Makefile
similarity index 100%
rename from makefile
rename to Makefile
diff --git a/testbench/rtl_tb/makefile b/testbench/rtl_tb/Makefile
similarity index 100%
rename from testbench/rtl_tb/makefile
rename to testbench/rtl_tb/Makefile