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nubia.dts
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nubia.dts
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/dts-v1/;
/ {
#address-cells = <0x02>;
#size-cells = <0x02>;
model = "MTP";
compatible = "qcom,sm8150-mtp\0qcom,sm8150\0qcom,mtp";
qcom,msm-name = "SM8150 V2";
qcom,msm-id = <0x153 0x20000>;
interrupt-parent = <0x01>;
qcom,pmic-name = "PM8150";
qcom,board-id = <0x08 0x00>;
cpus {
#address-cells = <0x02>;
#size-cells = <0x00>;
cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x00>;
enable-method = "psci";
capacity-dmips-mhz = <0x400>;
cache-size = <0x8000>;
next-level-cache = <0x02>;
sched-energy-costs = <0x03 0x04>;
qcom,lmh-dcvs = <0x05>;
#cooling-cells = <0x02>;
phandle = <0x13>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
phandle = <0x02>;
l3-cache {
compatible = "arm,arch-cache";
cache-size = <0x200000>;
cache-level = <0x03>;
phandle = <0x06>;
};
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
phandle = <0x86>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9000>;
phandle = <0x8e>;
};
l2-tlb {
qcom,dump-size = <0x5000>;
phandle = <0x9e>;
};
};
cpu@100 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x100>;
enable-method = "psci";
capacity-dmips-mhz = <0x400>;
cache-size = <0x8000>;
next-level-cache = <0x07>;
sched-energy-costs = <0x03 0x04>;
qcom,lmh-dcvs = <0x05>;
#cooling-cells = <0x02>;
phandle = <0x14>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
phandle = <0x07>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
phandle = <0x87>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9000>;
phandle = <0x8f>;
};
l2-tlb {
qcom,dump-size = <0x5000>;
phandle = <0x9f>;
};
};
cpu@200 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x200>;
enable-method = "psci";
capacity-dmips-mhz = <0x400>;
cache-size = <0x8000>;
next-level-cache = <0x08>;
sched-energy-costs = <0x03 0x04>;
qcom,lmh-dcvs = <0x05>;
#cooling-cells = <0x02>;
phandle = <0x15>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
phandle = <0x08>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
phandle = <0x88>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9000>;
phandle = <0x90>;
};
l2-tlb {
qcom,dump-size = <0x5000>;
phandle = <0xa0>;
};
};
cpu@300 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x300>;
enable-method = "psci";
capacity-dmips-mhz = <0x400>;
cache-size = <0x8000>;
next-level-cache = <0x09>;
sched-energy-costs = <0x03 0x04>;
qcom,lmh-dcvs = <0x05>;
#cooling-cells = <0x02>;
phandle = <0x16>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
phandle = <0x09>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
phandle = <0x89>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9000>;
phandle = <0x91>;
};
l2-tlb {
qcom,dump-size = <0x5000>;
phandle = <0xa1>;
};
};
cpu@400 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x400>;
enable-method = "psci";
capacity-dmips-mhz = <0x6cc>;
cache-size = <0x20000>;
next-level-cache = <0x0a>;
sched-energy-costs = <0x0b 0x0c>;
qcom,lmh-dcvs = <0x0d>;
#cooling-cells = <0x02>;
phandle = <0x17>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
qcom,dump-size = <0x88000>;
phandle = <0x0a>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x11000>;
phandle = <0x8a>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
phandle = <0x92>;
};
l1-itlb {
qcom,dump-size = <0x300>;
phandle = <0x96>;
};
l1-dtlb {
qcom,dump-size = <0x480>;
phandle = <0x9a>;
};
l2-tlb {
qcom,dump-size = <0x7800>;
phandle = <0xa2>;
};
};
cpu@500 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x500>;
enable-method = "psci";
capacity-dmips-mhz = <0x6cc>;
cache-size = <0x20000>;
next-level-cache = <0x0e>;
sched-energy-costs = <0x0b 0x0c>;
qcom,lmh-dcvs = <0x0d>;
#cooling-cells = <0x02>;
phandle = <0x18>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
qcom,dump-size = <0x88000>;
phandle = <0x0e>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x11000>;
phandle = <0x8b>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
phandle = <0x93>;
};
l1-itlb {
qcom,dump-size = <0x300>;
phandle = <0x97>;
};
l1-dtlb {
qcom,dump-size = <0x480>;
phandle = <0x9b>;
};
l2-tlb {
qcom,dump-size = <0x7800>;
phandle = <0xa3>;
};
};
cpu@600 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x600>;
enable-method = "psci";
capacity-dmips-mhz = <0x6cc>;
cache-size = <0x20000>;
next-level-cache = <0x0f>;
sched-energy-costs = <0x0b 0x0c>;
qcom,lmh-dcvs = <0x0d>;
#cooling-cells = <0x02>;
phandle = <0x19>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
qcom,dump-size = <0x88000>;
phandle = <0x0f>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x11000>;
phandle = <0x8c>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
phandle = <0x94>;
};
l1-itlb {
qcom,dump-size = <0x300>;
phandle = <0x98>;
};
l1-dtlb {
qcom,dump-size = <0x480>;
phandle = <0x9c>;
};
l2-tlb {
qcom,dump-size = <0x7800>;
phandle = <0xa4>;
};
};
cpu@700 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x00 0x700>;
enable-method = "psci";
capacity-dmips-mhz = <0x6cc>;
cache-size = <0x20000>;
next-level-cache = <0x10>;
sched-energy-costs = <0x11 0x12>;
qcom,lmh-dcvs = <0x0d>;
#cooling-cells = <0x02>;
phandle = <0x1a>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x80000>;
cache-level = <0x02>;
next-level-cache = <0x06>;
qcom,dump-size = <0x110000>;
phandle = <0x10>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x11000>;
phandle = <0x8d>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
phandle = <0x95>;
};
l1-itlb {
qcom,dump-size = <0x300>;
phandle = <0x99>;
};
l1-dtlb {
qcom,dump-size = <0x480>;
phandle = <0x9d>;
};
l2-tlb {
qcom,dump-size = <0x7800>;
phandle = <0xa5>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <0x13>;
};
core1 {
cpu = <0x14>;
};
core2 {
cpu = <0x15>;
};
core3 {
cpu = <0x16>;
};
};
cluster1 {
core0 {
cpu = <0x17>;
};
core1 {
cpu = <0x18>;
};
core2 {
cpu = <0x19>;
};
};
cluster2 {
core0 {
cpu = <0x1a>;
};
};
};
};
soc {
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x00 0xffffffff>;
compatible = "simple-bus";
phandle = <0x2fa>;
qcom,gdsc@0x106004 {
compatible = "qcom,gdsc";
regulator-name = "emac_gdsc";
reg = <0x106004 0x04>;
status = "ok";
phandle = <0x2fb>;
};
qcom,gdsc@0x16b004 {
compatible = "qcom,gdsc";
regulator-name = "pcie_0_gdsc";
reg = <0x16b004 0x04>;
status = "ok";
phandle = <0x19d>;
};
qcom,gdsc@0x18d004 {
compatible = "qcom,gdsc";
regulator-name = "pcie_1_gdsc";
reg = <0x18d004 0x04>;
status = "ok";
phandle = <0x1a2>;
};
qcom,gdsc@0x175004 {
compatible = "qcom,gdsc";
regulator-name = "ufs_card_gdsc";
reg = <0x175004 0x04>;
status = "disabled";
phandle = <0x2fc>;
};
qcom,gdsc@0x177004 {
compatible = "qcom,gdsc";
regulator-name = "ufs_phy_gdsc";
reg = <0x177004 0x04>;
status = "ok";
phandle = <0xa9>;
};
qcom,gdsc@0x10f004 {
compatible = "qcom,gdsc";
regulator-name = "usb30_prim_gdsc";
reg = <0x10f004 0x04>;
status = "ok";
phandle = <0x2ec>;
};
qcom,gdsc@0x110004 {
compatible = "qcom,gdsc";
regulator-name = "usb30_sec_gdsc";
reg = <0x110004 0x04>;
status = "ok";
phandle = <0x2f1>;
};
qcom,gdsc@0x17d040 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc";
reg = <0x17d040 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x238>;
};
qcom,gdsc@0x17d044 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc";
reg = <0x17d044 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x234>;
};
qcom,gdsc@0x17d048 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc";
reg = <0x17d048 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x235>;
};
qcom,gdsc@0x17d04c {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc";
reg = <0x17d04c 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x239>;
};
qcom,gdsc@0x17d050 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
reg = <0x17d050 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x237>;
};
qcom,gdsc@0x17d054 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc";
reg = <0x17d054 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x23a>;
};
qcom,gdsc@0x17d058 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
reg = <0x17d058 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x236>;
};
qcom,gdsc@0x17d05c {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_turing_mmu_tbu0_gdsc";
reg = <0x17d05c 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x2fd>;
};
qcom,gdsc@0x17d060 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_turing_mmu_tbu1_gdsc";
reg = <0x17d060 0x04>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
phandle = <0x2fe>;
};
qcom,gdsc@0xad07004 {
compatible = "qcom,gdsc";
regulator-name = "bps_gdsc";
reg = <0xad07004 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0x08>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "bps_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01>;
qcom,support-hw-trigger;
phandle = <0x41>;
};
qcom,gdsc@0xad08004 {
compatible = "qcom,gdsc";
regulator-name = "ipe_0_gdsc";
reg = <0xad08004 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0x08>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "ipe_0_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01>;
qcom,support-hw-trigger;
phandle = <0x3f>;
};
qcom,gdsc@0xad09004 {
compatible = "qcom,gdsc";
regulator-name = "ipe_1_gdsc";
reg = <0xad09004 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0x08>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "ipe_1_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01>;
qcom,support-hw-trigger;
phandle = <0x40>;
};
qcom,gdsc@0xad0a004 {
compatible = "qcom,gdsc";
regulator-name = "ife_0_gdsc";
reg = <0xad0a004 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0x08>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "ife_0_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01>;
phandle = <0x3d>;
};
qcom,gdsc@0xad0b004 {
compatible = "qcom,gdsc";
regulator-name = "ife_1_gdsc";
reg = <0xad0b004 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0x08>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "ife_1_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01>;
phandle = <0x3e>;
};
qcom,gdsc@0xad0c1bc {
compatible = "qcom,gdsc";
regulator-name = "titan_top_gdsc";
reg = <0xad0c1bc 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0x08>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "titan_top_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x24d 0x00 0x00 0x01 0x24d 0x00 0x01>;
phandle = <0x31>;
};
qcom,gdsc@0xaf03000 {
compatible = "qcom,gdsc";
regulator-name = "mdss_core_gdsc";
reg = <0xaf03000 0x04>;
qcom,support-hw-trigger;
status = "ok";
proxy-supply = <0x1d>;
qcom,proxy-consumer-enable;
clock-names = "ahb_clk";
clocks = <0x1b 0x14>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "mdss_core_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x01>;
phandle = <0x1d>;
};
syscon@0x2c91540 {
compatible = "syscon";
reg = <0x2c91540 0x04>;
phandle = <0x1e>;
};
qcom,gdsc@0x2c9106c {
compatible = "qcom,gdsc";
regulator-name = "gpu_cx_gdsc";
reg = <0x2c9106c 0x04>;
hw-ctrl-addr = <0x1e>;
qcom,skip-disable;
qcom,gds-timeout = <0x1f4>;
qcom,clk-dis-wait-val = <0x08>;
mboxes = <0x1f 0x00>;
status = "ok";
parent-supply = <0x20>;
phandle = <0x2f5>;
};
syscon@0x2c91508 {
compatible = "syscon";
reg = <0x2c91508 0x04>;
phandle = <0x21>;
};
syscon@0x2c91008 {
compatible = "syscon";
reg = <0x2c91008 0x04>;
phandle = <0x22>;
};
qcom,gdsc@0x2c9100c {
compatible = "qcom,gdsc";
regulator-name = "gpu_gx_gdsc";
reg = <0x2c9100c 0x04>;
domain-addr = <0x21>;
sw-reset = <0x22>;
qcom,reset-aon-logic;
status = "ok";
parent-supply = <0x23>;
vdd_parent-supply = <0x23>;
phandle = <0x2f6>;
};
qcom,gdsc@0xab00814 {
compatible = "qcom,gdsc";
regulator-name = "mvsc_gdsc";
reg = <0xab00814 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0xc0>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "mvsc_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x254 0x00 0x00 0x01 0x254 0x00 0x01>;
phandle = <0x84>;
};
qcom,gdsc@0xab00874 {
compatible = "qcom,gdsc";
regulator-name = "mvs0_gdsc";
reg = <0xab00874 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0xc0>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "mvs0_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x254 0x00 0x00 0x01 0x254 0x00 0x01>;
qcom,support-hw-trigger;
phandle = <0x2e9>;
};
qcom,gdsc@0xab008b4 {
compatible = "qcom,gdsc";
regulator-name = "mvs1_gdsc";
reg = <0xab008b4 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0xc0>;
parent-supply = <0x1c>;
vdd_parent-supply = <0x1c>;
qcom,msm-bus,name = "mvs1_gdsc_ahb";
qcom,msm-bus,num-cases = <0x02>;
qcom,msm-bus,num-paths = <0x01>;
qcom,msm-bus,vectors-KBps = <0x01 0x254 0x00 0x00 0x01 0x254 0x00 0x01>;
qcom,support-hw-trigger;
phandle = <0x2ea>;
};
qcom,gdsc@0x9911028 {
compatible = "qcom,gdsc";
regulator-name = "npu_core_gdsc";
reg = <0x9911028 0x04>;
status = "ok";
clock-names = "ahb_clk";
clocks = <0x1b 0x2c>;
phandle = <0x69>;
};
qcom,mdss_dsi_pll@ae94900 {
compatible = "qcom,mdss_dsi_pll_7nm_v2";
label = "MDSS DSI 0 PLL";
cell-index = <0x00>;
#clock-cells = <0x01>;
reg = <0xae94900 0x260 0xae94400 0x800 0xaf03000 0x08>;
reg-names = "pll_base\0phy_base\0gdsc_base";
clocks = <0x24 0x00>;
clock-names = "iface_clk";
clock-rate = <0x00>;
gdsc-supply = <0x1d>;
qcom,dsi-pll-ssc-en;
qcom,dsi-pll-ssc-mode = "down-spread";
phandle = <0x2ff>;
qcom,platform-supply-entries {
#address-cells = <0x01>;
#size-cells = <0x00>;
qcom,platform-supply-entry@0 {
reg = <0x00>;
qcom,supply-name = "gdsc";
qcom,supply-min-voltage = <0x00>;
qcom,supply-max-voltage = <0x00>;
qcom,supply-enable-load = <0x00>;
qcom,supply-disable-load = <0x00>;
};
};
};
qcom,mdss_dsi_pll@ae96900 {
compatible = "qcom,mdss_dsi_pll_7nm_v2";
label = "MDSS DSI 1 PLL";
cell-index = <0x01>;
#clock-cells = <0x01>;
reg = <0xae96900 0x260 0xae96400 0x800 0xaf03000 0x08>;
reg-names = "pll_base\0phy_base\0gdsc_base";
clocks = <0x24 0x00>;
clock-names = "iface_clk";
clock-rate = <0x00>;
gdsc-supply = <0x1d>;
qcom,dsi-pll-ssc-en;
qcom,dsi-pll-ssc-mode = "down-spread";
phandle = <0x300>;
qcom,platform-supply-entries {
#address-cells = <0x01>;
#size-cells = <0x00>;
qcom,platform-supply-entry@0 {
reg = <0x00>;
qcom,supply-name = "gdsc";
qcom,supply-min-voltage = <0x00>;
qcom,supply-max-voltage = <0x00>;
qcom,supply-enable-load = <0x00>;
qcom,supply-disable-load = <0x00>;
};
};
};
qcom,mdss_dp_pll@c011000 {
compatible = "qcom,mdss_dp_pll_7nm";
label = "MDSS DP PLL";
cell-index = <0x00>;
#clock-cells = <0x01>;
reg = <0x88ea000 0x200 0x88eaa00 0x200 0x88ea200 0x200 0x88ea600 0x200 0xaf03000 0x08>;
reg-names = "pll_base\0phy_base\0ln_tx0_base\0ln_tx1_base\0gdsc_base";
clocks = <0x24 0x00 0x25 0x00 0x1b 0x14 0x1b 0xb6 0x1b 0xba>;
clock-names = "iface_clk\0ref_clk_src\0gcc_iface\0ref_clk\0pipe_clk";
clock-rate = <0x00>;
phandle = <0x2c>;
};
qcom,mdss_mdp@ae00000 {
compatible = "qcom,sde-kms";
reg = <0xae00000 0x84208 0xaeb0000 0x2008 0xaeac000 0x214>;
reg-names = "mdp_phys\0vbif_phys\0regdma_phys";
clocks = <0x1b 0x14 0x1b 0x15 0x1b 0x16 0x24 0x00 0x24 0x2b 0x24 0x37 0x24 0x2d 0x24 0x33>;
clock-names = "gcc_iface\0gcc_bus\0gcc_nrt_bus\0iface_clk\0core_clk\0vsync_clk\0lut_clk\0rot_clk";
clock-rate = <0x00 0x00 0x00 0x00 0x11e1a300 0x124f800 0x11e1a300 0x124f800>;
clock-max-rate = <0x00 0x00 0x00 0x00 0x1b6b0b00 0x124f800 0x1b6b0b00 0x1b6b0b00>;
sde-vdd-supply = <0x1d>;
mmcx-supply = <0x1c>;
interrupts = <0x00 0x53 0x00>;
interrupt-controller;
#interrupt-cells = <0x01>;
iommus = <0x26 0x800 0x420>;
#address-cells = <0x01>;
#size-cells = <0x00>;
#power-domain-cells = <0x00>;
qcom,sde-off = <0x1000>;
qcom,sde-len = <0x45c>;
qcom,sde-ctl-off = <0x2000 0x2200 0x2400 0x2600 0x2800 0x2a00>;
qcom,sde-ctl-size = <0x1e0>;
qcom,sde-ctl-display-pref = "primary\0none\0none\0none\0none";
qcom,sde-mixer-off = <0x45000 0x46000 0x47000 0x48000 0x49000 0x4a000>;
qcom,sde-mixer-size = <0x320>;
qcom,sde-mixer-display-pref = "primary\0primary\0none\0none\0none\0none";
qcom,sde-mixer-cwb-pref = "none\0none\0cwb\0cwb\0cwb\0cwb";
qcom,sde-dspp-top-off = <0x1300>;
qcom,sde-dspp-top-size = <0x80>;
qcom,sde-dspp-off = <0x55000 0x57000 0x59000 0x5b000>;
qcom,sde-dspp-size = <0x1800>;
qcom,sde-dest-scaler-top-off = <0x61000>;
qcom,sde-dest-scaler-top-size = <0x1c>;
qcom,sde-dest-scaler-off = <0x800 0x1000>;
qcom,sde-dest-scaler-size = <0xa0>;
qcom,sde-wb-off = <0x66000>;
qcom,sde-wb-size = <0x2c8>;
qcom,sde-wb-xin-id = <0x06>;
qcom,sde-wb-id = <0x02>;
qcom,sde-wb-clk-ctrl = <0x3b8 0x18>;
qcom,sde-intf-off = <0x6b000 0x6b800 0x6c000 0x6c800>;
qcom,sde-intf-size = <0x2b8>;
qcom,sde-intf-type = "dp\0dsi\0dsi\0dp";
qcom,sde-pp-off = <0x71000 0x71800 0x72000 0x72800 0x73000 0x73800>;
qcom,sde-pp-slave = <0x00 0x00 0x00 0x00 0x00 0x00>;
qcom,sde-pp-size = <0xd4>;
qcom,sde-pp-merge-3d-id = <0x00 0x00 0x01 0x01 0x02 0x02>;
qcom,sde-merge-3d-off = <0x84000 0x84100 0x84200>;
qcom,sde-merge-3d-size = <0x100>;
qcom,sde-te2-off = <0x2000 0x2000 0x00 0x00 0x00 0x00>;
qcom,sde-cdm-off = <0x7a200>;
qcom,sde-cdm-size = <0x224>;
qcom,sde-dsc-off = <0x81000 0x81400 0x81800 0x81c00>;
qcom,sde-dsc-size = <0x140>;
qcom,sde-dither-off = <0x30e0 0x30e0 0x30e0 0x30e0 0x30e0 0x30e0>;
qcom,sde-dither-version = <0x10000>;
qcom,sde-dither-size = <0x20>;
qcom,sde-sspp-type = "vig\0vig\0vig\0vig\0dma\0dma\0dma\0dma";
qcom,sde-sspp-off = <0x5000 0x7000 0x9000 0xb000 0x25000 0x27000 0x29000 0x2b000>;
qcom,sde-sspp-src-size = <0x1f0>;
qcom,sde-sspp-xin-id = <0x00 0x04 0x08 0x0c 0x01 0x05 0x09 0x0d>;
qcom,sde-sspp-excl-rect = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
qcom,sde-sspp-smart-dma-priority = <0x05 0x06 0x07 0x08 0x01 0x02 0x03 0x04>;
qcom,sde-smart-dma-rev = "smart_dma_v2p5";
qcom,sde-mixer-pair-mask = <0x02 0x01 0x04 0x03 0x06 0x05>;
qcom,sde-mixer-blend-op-off = <0x20 0x38 0x50 0x68 0x80 0x98 0xb0 0xc8 0xe0 0xf8 0x110>;
qcom,sde-max-per-pipe-bw-kbps = <0x44aa20 0x44aa20 0x44aa20 0x44aa20 0x44aa20 0x44aa20 0x44aa20 0x44aa20>;
qcom,sde-sspp-clk-ctrl = <0x2ac 0x00 0x2b4 0x00 0x2bc 0x00 0x2c4 0x00 0x2ac 0x08 0x2b4 0x08 0x2bc 0x08 0x2c4 0x08>;
qcom,sde-sspp-csc-off = <0x1a00>;
qcom,sde-csc-type = "csc-10bit";
qcom,sde-qseed-type = "qseedv3";
qcom,sde-sspp-qseed-off = <0xa00>;
qcom,sde-mixer-linewidth = <0xa00>;
qcom,sde-sspp-linewidth = <0x1000>;
qcom,sde-wb-linewidth = <0x1000>;
qcom,sde-mixer-blendstages = <0x0b>;
qcom,sde-highest-bank-bit = <0x02>;
qcom,sde-ubwc-version = <0x300>;
qcom,sde-ubwc-bw-calc-version = <0x01>;
qcom,sde-smart-panel-align-mode = <0x0c>;
qcom,sde-panic-per-pipe;
qcom,sde-has-cdp;
qcom,sde-has-src-split;
qcom,sde-pipe-order-version = <0x01>;
qcom,sde-has-dim-layer;
qcom,sde-has-idle-pc;
qcom,sde-has-dest-scaler;
qcom,sde-max-dest-scaler-input-linewidth = <0x800>;
qcom,sde-max-dest-scaler-output-linewidth = <0xa00>;
qcom,sde-max-bw-low-kbps = <0xc35000>;
qcom,sde-max-bw-high-kbps = <0xc35000>;
qcom,sde-min-core-ib-kbps = <0x00>;
qcom,sde-min-llcc-ib-kbps = <0x00>;
qcom,sde-min-dram-ib-kbps = <0xc3500>;
qcom,sde-dram-channels = <0x02>;
qcom,sde-num-nrt-paths = <0x00>;
qcom,sde-dspp-ad-version = <0x40000>;
qcom,sde-dspp-ad-off = <0x28000 0x27000>;
qcom,sde-vbif-off = <0x00>;
qcom,sde-vbif-size = <0x1040>;
qcom,sde-vbif-id = <0x00>;
qcom,sde-vbif-memtype-0 = <0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03>;
qcom,sde-vbif-memtype-1 = <0x03 0x03 0x03 0x03 0x03 0x03>;
qcom,sde-vbif-qos-rt-remap = <0x03 0x03 0x04 0x04 0x05 0x05 0x06 0x06>;
qcom,sde-vbif-qos-nrt-remap = <0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03>;
qcom,sde-danger-lut = <0x0f 0xffff 0x00 0x00 0xffff>;
qcom,sde-safe-lut-linear = <0x00 0xfff8>;
qcom,sde-safe-lut-macrotile = <0x00 0xf000>;
qcom,sde-safe-lut-macrotile-qseed = <0x00 0xf000>;
qcom,sde-safe-lut-nrt = <0x00 0xffff>;
qcom,sde-safe-lut-cwb = <0x00 0xffff>;
qcom,sde-qos-lut-linear = <0x00 0x112222 0x22223357>;
qcom,sde-qos-lut-macrotile = <0x00 0x112233 0x44556677>;
qcom,sde-qos-lut-macrotile-qseed = <0x00 0x112233 0x66777777>;
qcom,sde-qos-lut-nrt = <0x00 0x00 0x00>;
qcom,sde-qos-lut-cwb = <0x00 0x75300000 0x00>;
qcom,sde-cdp-setting = <0x01 0x01 0x01 0x00>;
qcom,sde-qos-cpu-mask = <0x03>;
qcom,sde-qos-cpu-dma-latency = <0x2c>;
qcom,sde-reg-dma-off = <0x00>;
qcom,sde-reg-dma-version = <0x10001>;
qcom,sde-reg-dma-trigger-off = <0x119c>;
qcom,sde-secure-sid-mask = <0x4200801>;
qcom,fullsize-va-map;
phandle = <0x28>;
connectors = <0x302 0x5db 0x5dc 0x5dd>;
#cooling-cells = <0x02>;