diff --git a/Platform/Qualcomm/sm6225/Apriori.fog.fdf.inc b/Platform/Qualcomm/sm6225/Apriori.fog.fdf.inc
index 65be2ba980..88e80d0eb8 100644
--- a/Platform/Qualcomm/sm6225/Apriori.fog.fdf.inc
+++ b/Platform/Qualcomm/sm6225/Apriori.fog.fdf.inc
@@ -19,7 +19,7 @@ APRIORI DXE {
   INF  Platform/EFI_Binaries/Drivers/sm6225/HWIODxe/HWIODxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/ChipInfoDxe/ChipInfoDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/PlatformInfoDxe/PlatformInfoDxe.inf
-  INF  Platform/EFI_Binaries/Drivers/sm6225/HALIOMMUDxe/HALIOMMUDxe.inf
+  INF  Platform/EFI_Binaries/Drivers/Devices/fog/HALIOMMUDxe/HALIOMMUDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/GLinkDxe/GLinkDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/ULogDxe/ULogDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/NpaDxe/NpaDxe.inf
@@ -46,7 +46,7 @@ APRIORI DXE {
   INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
   INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
 
-    INF  Platform/EFI_Binaries/Drivers/sm6225/SdccDxe/SdccDxe.inf
+    INF  Platform/EFI_Binaries/Drivers/Devices/fog/SdccDxe/SdccDxe.inf
     INF  Platform/EFI_Binaries/Drivers/Devices/fog/UFSDxe/UFSDxe.inf
 
   INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -92,6 +92,9 @@ APRIORI DXE {
   INF  Platform/EFI_Binaries/Drivers/sm6225/QcomChargerDxe/QcomChargerDxeLA.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/ChargerExDxe/ChargerExDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/UsbfnDwc3Dxe/UsbfnDwc3Dxe.inf
+  INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+  INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+  INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/UsbConfigDxe/UsbConfigDxe.inf
   INF  Platform/EFI_Binaries/Drivers/Devices/fog/ButtonsDxe/ButtonsDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/TsensDxe/TsensDxe.inf
diff --git a/Platform/Qualcomm/sm6225/dxe.fog.fdf.inc b/Platform/Qualcomm/sm6225/dxe.fog.fdf.inc
index 6d05cb6e90..b9c3a0db66 100644
--- a/Platform/Qualcomm/sm6225/dxe.fog.fdf.inc
+++ b/Platform/Qualcomm/sm6225/dxe.fog.fdf.inc
@@ -3,7 +3,7 @@
   INF  Platform/EFI_Binaries/Drivers/sm6225/HWIODxe/HWIODxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/ChipInfoDxe/ChipInfoDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/PlatformInfoDxe/PlatformInfoDxe.inf
-  INF  Platform/EFI_Binaries/Drivers/sm6225/HALIOMMUDxe/HALIOMMUDxe.inf
+  INF  Platform/EFI_Binaries/Drivers/Devices/fog/HALIOMMUDxe/HALIOMMUDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/GLinkDxe/GLinkDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/ULogDxe/ULogDxe.inf
   INF  Platform/EFI_Binaries/Drivers/sm6225/NpaDxe/NpaDxe.inf
@@ -17,7 +17,7 @@
             SECTION UI = "ScmDxe"
     }
 
-    INF  Platform/EFI_Binaries/Drivers/sm6225/SdccDxe/SdccDxe.inf
+    INF  Platform/EFI_Binaries/Drivers/Devices/fog/SdccDxe/SdccDxe.inf
     INF  Platform/EFI_Binaries/Drivers/Devices/fog/UFSDxe/UFSDxe.inf
 
     # INF  Platform/EFI_Binaries/Drivers/sm6225/TzDxe/TzDxeLA.inf
diff --git a/Platform/Qualcomm/sm6225/sm6225.fog.dsc b/Platform/Qualcomm/sm6225/sm6225.fog.dsc
index e95a3cf7b8..4feb7313ca 100644
--- a/Platform/Qualcomm/sm6225/sm6225.fog.dsc
+++ b/Platform/Qualcomm/sm6225/sm6225.fog.dsc
@@ -63,7 +63,7 @@
   # Ported from SurfaceDuoPkg
   AslUpdateLib|Silicon/Qualcomm/QcomPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
   SerialPortLib|Silicon/Qualcomm/QcomPkg/Library/FrameBufferSerialPortLib/FrameBufferSerialPortLib.inf
-  #SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+  # SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
   PlatformMemoryMapLib|Silicon/Qualcomm/sm6225/Library/PlatformMemoryMapLib/PlatformMemoryMapLib.inf
   PlatformPeiLib|Silicon/Qualcomm/sm6225/Library/PlatformPeiLib/PlatformPeiLib.inf
   PlatformPrePiLib|Silicon/Qualcomm/sm6225/Library/PlatformPrePiLib/PlatformPrePiLib.inf
diff --git a/Platform/Xiaomi/sm6225/fog.fdf.inc b/Platform/Xiaomi/sm6225/fog.fdf.inc
index dddb53e0a2..f194fefb5d 100644
--- a/Platform/Xiaomi/sm6225/fog.fdf.inc
+++ b/Platform/Xiaomi/sm6225/fog.fdf.inc
@@ -1,6 +1,13 @@
 // per-device BSP DXEs
 
 // ACPI Tables
+FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD {
+  SECTION RAW = Silicon/Qualcomm/sm6225/AcpiTables/DSDT.min.aml
+  SECTION RAW = Silicon/Qualcomm/sm6225/AcpiTables/FADT.aml
+  SECTION RAW = Silicon/Qualcomm/sm6225/AcpiTables/GTDT.aml
+  SECTION RAW = Silicon/Qualcomm/sm6225/AcpiTables/MADT.aml
+  SECTION UI = "AcpiTables"
+}
 
 FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 {
   SECTION RAW = Platform/Xiaomi/sm6225/FdtBlob_compat/fog.dtb
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/DSDT.min.aml b/Silicon/Qualcomm/sm6225/AcpiTables/DSDT.min.aml
new file mode 100644
index 0000000000..b202414cf4
Binary files /dev/null and b/Silicon/Qualcomm/sm6225/AcpiTables/DSDT.min.aml differ
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/DSDT.min.asl b/Silicon/Qualcomm/sm6225/AcpiTables/DSDT.min.asl
new file mode 100644
index 0000000000..862d528928
--- /dev/null
+++ b/Silicon/Qualcomm/sm6225/AcpiTables/DSDT.min.asl
@@ -0,0 +1,89 @@
+/* Minimum DSDT for WoA boot */
+
+DefinitionBlock ("DSDT.aml", "DSDT", 5, "LMNL", "EDK2", 2)
+{
+	Scope (\_SB_)
+    {
+        /* 8 CPU Cores */
+		Device (CPU0)
+        {
+		    Name (_HID, "ACPI0007")
+            Name (_UID, 0x0)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+        Device (CPU1)
+        {
+            Name (_HID, "ACPI0007")
+            Name (_UID, 0x1)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+        Device (CPU2)
+        {
+            Name (_HID, "ACPI0007")
+            Name (_UID, 0x2)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+        Device (CPU3)
+        {
+            Name (_HID, "ACPI0007")
+            Name (_UID, 0x3)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+        Device (CPU4)
+        {
+            Name (_HID, "ACPI0007")
+            Name (_UID, 0x4)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+        Device (CPU5)
+        {
+            Name (_HID, "ACPI0007")
+            Name (_UID, 0x5)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+        Device (CPU6)
+        {
+            Name (_HID, "ACPI0007")
+            Name (_UID, 0x6)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+        Device (CPU7)
+        {
+            Name (_HID, "ACPI0007")
+            Name (_UID, 0x7)
+			Method (_STA)
+            {
+                Return(0xf)
+            }
+        }
+
+	}
+}
\ No newline at end of file
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/FADT.aml b/Silicon/Qualcomm/sm6225/AcpiTables/FADT.aml
new file mode 100644
index 0000000000..de8f3ee221
Binary files /dev/null and b/Silicon/Qualcomm/sm6225/AcpiTables/FADT.aml differ
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/FADT.dsl b/Silicon/Qualcomm/sm6225/AcpiTables/FADT.dsl
new file mode 100644
index 0000000000..796e8c7e88
--- /dev/null
+++ b/Silicon/Qualcomm/sm6225/AcpiTables/FADT.dsl
@@ -0,0 +1,196 @@
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ * 
+ * Disassembly of FADT.aml, Sun Nov 12 22:32:34 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue
+ */
+
+[000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
+[004h 0004   4]                 Table Length : 0000010C
+[008h 0008   1]                     Revision : 05
+[009h 0009   1]                     Checksum : 7F
+[00Ah 0010   6]                       Oem ID : "QCOM  "
+[010h 0016   8]                 Oem Table ID : "QCOMEDK2"
+[018h 0024   4]                 Oem Revision : 00000680
+[01Ch 0028   4]              Asl Compiler ID : "INTL"
+[020h 0032   4]        Asl Compiler Revision : 20200925
+
+[024h 0036   4]                 FACS Address : 00000000
+[028h 0040   4]                 DSDT Address : 00000000
+[02Ch 0044   1]                        Model : 00
+[02Dh 0045   1]                   PM Profile : 08 [Tablet]
+[02Eh 0046   2]                SCI Interrupt : 0000
+[030h 0048   4]             SMI Command Port : 00000000
+[034h 0052   1]            ACPI Enable Value : 00
+[035h 0053   1]           ACPI Disable Value : 00
+[036h 0054   1]               S4BIOS Command : 00
+[037h 0055   1]              P-State Control : 00
+[038h 0056   4]     PM1A Event Block Address : 00000000
+[03Ch 0060   4]     PM1B Event Block Address : 00000000
+[040h 0064   4]   PM1A Control Block Address : 00000000
+[044h 0068   4]   PM1B Control Block Address : 00000000
+[048h 0072   4]    PM2 Control Block Address : 00000000
+[04Ch 0076   4]       PM Timer Block Address : 00000000
+[050h 0080   4]           GPE0 Block Address : 00000000
+[054h 0084   4]           GPE1 Block Address : 00000000
+[058h 0088   1]       PM1 Event Block Length : 00
+[059h 0089   1]     PM1 Control Block Length : 00
+[05Ah 0090   1]     PM2 Control Block Length : 00
+[05Bh 0091   1]        PM Timer Block Length : 00
+[05Ch 0092   1]            GPE0 Block Length : 00
+[05Dh 0093   1]            GPE1 Block Length : 00
+[05Eh 0094   1]             GPE1 Base Offset : 00
+[05Fh 0095   1]                 _CST Support : 00
+[060h 0096   2]                   C2 Latency : 0000
+[062h 0098   2]                   C3 Latency : 0000
+[064h 0100   2]               CPU Cache Size : 0000
+[066h 0102   2]           Cache Flush Stride : 0000
+[068h 0104   1]            Duty Cycle Offset : 00
+[069h 0105   1]             Duty Cycle Width : 00
+[06Ah 0106   1]          RTC Day Alarm Index : 00
+[06Bh 0107   1]        RTC Month Alarm Index : 00
+[06Ch 0108   1]            RTC Century Index : 00
+[06Dh 0109   2]   Boot Flags (decoded below) : 0000
+               Legacy Devices Supported (V2) : 0
+            8042 Present on ports 60/64 (V2) : 0
+                        VGA Not Present (V4) : 0
+                      MSI Not Supported (V4) : 0
+                PCIe ASPM Not Supported (V4) : 0
+                   CMOS RTC Not Present (V5) : 0
+[06Fh 0111   1]                     Reserved : 00
+[070h 0112   4]        Flags (decoded below) : 00300000
+      WBINVD instruction is operational (V1) : 0
+              WBINVD flushes all caches (V1) : 0
+                    All CPUs support C1 (V1) : 0
+                  C2 works on MP system (V1) : 0
+            Control Method Power Button (V1) : 0
+            Control Method Sleep Button (V1) : 0
+        RTC wake not in fixed reg space (V1) : 0
+            RTC can wake system from S4 (V1) : 0
+                        32-bit PM Timer (V1) : 0
+                      Docking Supported (V1) : 0
+               Reset Register Supported (V2) : 0
+                            Sealed Case (V3) : 0
+                    Headless - No Video (V3) : 0
+        Use native instr after SLP_TYPx (V3) : 0
+              PCIEXP_WAK Bits Supported (V4) : 0
+                     Use Platform Timer (V4) : 0
+               RTC_STS valid on S4 wake (V4) : 0
+                Remote Power-on capable (V4) : 0
+                 Use APIC Cluster Model (V4) : 0
+     Use APIC Physical Destination Mode (V4) : 0
+                       Hardware Reduced (V5) : 1
+                      Low Power S0 Idle (V5) : 1
+
+[074h 0116  12]               Reset Register : [Generic Address Structure]
+[074h 0116   1]                     Space ID : 03 [EmbeddedControl]
+[075h 0117   1]                    Bit Width : 00
+[076h 0118   1]                   Bit Offset : 00
+[077h 0119   1]         Encoded Access Width : 03 [DWord Access:32]
+[078h 0120   8]                      Address : 00000000009020B4
+
+[080h 0128   1]         Value to cause reset : 01
+[081h 0129   2]    ARM Flags (decoded below) : 0001
+                              PSCI Compliant : 1
+                       Must use HVC for PSCI : 0
+
+[083h 0131   1]          FADT Minor Revision : 00
+[084h 0132   8]                 FACS Address : 0000000000000000
+[08Ch 0140   8]                 DSDT Address : 0000000000000000
+[094h 0148  12]             PM1A Event Block : [Generic Address Structure]
+[094h 0148   1]                     Space ID : 00 [SystemMemory]
+[095h 0149   1]                    Bit Width : 00
+[096h 0150   1]                   Bit Offset : 00
+[097h 0151   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152   8]                      Address : 0000000000000000
+
+[0A0h 0160  12]             PM1B Event Block : [Generic Address Structure]
+[0A0h 0160   1]                     Space ID : 00 [SystemMemory]
+[0A1h 0161   1]                    Bit Width : 00
+[0A2h 0162   1]                   Bit Offset : 00
+[0A3h 0163   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164   8]                      Address : 0000000000000000
+
+[0ACh 0172  12]           PM1A Control Block : [Generic Address Structure]
+[0ACh 0172   1]                     Space ID : 00 [SystemMemory]
+[0ADh 0173   1]                    Bit Width : 00
+[0AEh 0174   1]                   Bit Offset : 00
+[0AFh 0175   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176   8]                      Address : 0000000000000000
+
+[0B8h 0184  12]           PM1B Control Block : [Generic Address Structure]
+[0B8h 0184   1]                     Space ID : 00 [SystemMemory]
+[0B9h 0185   1]                    Bit Width : 00
+[0BAh 0186   1]                   Bit Offset : 00
+[0BBh 0187   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188   8]                      Address : 0000000000000000
+
+[0C4h 0196  12]            PM2 Control Block : [Generic Address Structure]
+[0C4h 0196   1]                     Space ID : 00 [SystemMemory]
+[0C5h 0197   1]                    Bit Width : 00
+[0C6h 0198   1]                   Bit Offset : 00
+[0C7h 0199   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200   8]                      Address : 0000000000000000
+
+[0D0h 0208  12]               PM Timer Block : [Generic Address Structure]
+[0D0h 0208   1]                     Space ID : 00 [SystemMemory]
+[0D1h 0209   1]                    Bit Width : 00
+[0D2h 0210   1]                   Bit Offset : 00
+[0D3h 0211   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212   8]                      Address : 0000000000000000
+
+[0DCh 0220  12]                   GPE0 Block : [Generic Address Structure]
+[0DCh 0220   1]                     Space ID : 00 [SystemMemory]
+[0DDh 0221   1]                    Bit Width : 00
+[0DEh 0222   1]                   Bit Offset : 00
+[0DFh 0223   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224   8]                      Address : 0000000000000000
+
+[0E8h 0232  12]                   GPE1 Block : [Generic Address Structure]
+[0E8h 0232   1]                     Space ID : 00 [SystemMemory]
+[0E9h 0233   1]                    Bit Width : 00
+[0EAh 0234   1]                   Bit Offset : 00
+[0EBh 0235   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236   8]                      Address : 0000000000000000
+
+
+[0F4h 0244  12]       Sleep Control Register : [Generic Address Structure]
+[0F4h 0244   1]                     Space ID : 00 [SystemMemory]
+[0F5h 0245   1]                    Bit Width : 00
+[0F6h 0246   1]                   Bit Offset : 00
+[0F7h 0247   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[0F8h 0248   8]                      Address : 0000000000000000
+
+[100h 0256  12]        Sleep Status Register : [Generic Address Structure]
+[100h 0256   1]                     Space ID : 00 [SystemMemory]
+[101h 0257   1]                    Bit Width : 00
+[102h 0258   1]                   Bit Offset : 00
+[103h 0259   1]         Encoded Access Width : 00 [Undefined/Legacy]
+[104h 0260   8]                      Address : 0000000000000000
+
+/**** ACPI table terminates in the middle of a data structure! (dump table) */
+
+Raw Table Data: Length 268 (0x10C)
+
+    0000: 46 41 43 50 0C 01 00 00 05 7F 51 43 4F 4D 20 20  // FACP......QCOM  
+    0010: 51 43 4F 4D 45 44 4B 32 60 06 00 00 49 4E 54 4C  // QCOMEDK2`...INTL
+    0020: 25 09 20 20 00 00 00 00 00 00 00 00 00 08 00 00  // %.  ............
+    0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0070: 00 00 30 00 03 00 00 03 B4 20 90 00 00 00 00 00  // ..0...... ......
+    0080: 01 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0100: 00 00 00 00 00 00 00 00 00 00 00 00              // ............
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/GTDT.aml b/Silicon/Qualcomm/sm6225/AcpiTables/GTDT.aml
new file mode 100644
index 0000000000..815ee18266
Binary files /dev/null and b/Silicon/Qualcomm/sm6225/AcpiTables/GTDT.aml differ
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/GTDT.dsl b/Silicon/Qualcomm/sm6225/AcpiTables/GTDT.dsl
new file mode 100644
index 0000000000..43601fa170
--- /dev/null
+++ b/Silicon/Qualcomm/sm6225/AcpiTables/GTDT.dsl
@@ -0,0 +1,88 @@
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ * 
+ * Disassembly of GTDT.aml, Sun Nov 12 22:32:46 2023
+ *
+ * ACPI Data Table [GTDT]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue
+ */
+
+[000h 0000   4]                    Signature : "GTDT"    [Generic Timer Description Table]
+[004h 0004   4]                 Table Length : 0000009C
+[008h 0008   1]                     Revision : 02
+[009h 0009   1]                     Checksum : 1A
+[00Ah 0010   6]                       Oem ID : "QCOM  "
+[010h 0016   8]                 Oem Table ID : "QCOMEDK2"
+[018h 0024   4]                 Oem Revision : 00000680
+[01Ch 0028   4]              Asl Compiler ID : "INTL"
+[020h 0032   4]        Asl Compiler Revision : 20200925
+
+[024h 0036   8]        Counter Block Address : FFFFFFFFFFFFFFFF
+[02Ch 0044   4]                     Reserved : 00000000
+
+[030h 0048   4]         Secure EL1 Interrupt : 00000001
+[034h 0052   4]    EL1 Flags (decoded below) : 00000000
+                                Trigger Mode : 0
+                                    Polarity : 0
+                                   Always On : 0
+
+[038h 0056   4]     Non-Secure EL1 Interrupt : 00000002
+[03Ch 0060   4]   NEL1 Flags (decoded below) : 00000000
+                                Trigger Mode : 0
+                                    Polarity : 0
+                                   Always On : 0
+
+[040h 0064   4]      Virtual Timer Interrupt : 00000003
+[044h 0068   4]     VT Flags (decoded below) : 00000000
+                                Trigger Mode : 0
+                                    Polarity : 0
+                                   Always On : 0
+
+[048h 0072   4]     Non-Secure EL2 Interrupt : 00000000
+[04Ch 0076   4]   NEL2 Flags (decoded below) : 00000000
+                                Trigger Mode : 0
+                                    Polarity : 0
+                                   Always On : 0
+[050h 0080   8]   Counter Read Block Address : FFFFFFFFFFFFFFFF
+
+[058h 0088   4]         Platform Timer Count : 00000001
+[05Ch 0092   4]        Platform Timer Offset : 00000060
+
+[060h 0096   1]                Subtable Type : 00 [Generic Timer Block]
+[061h 0097   2]                       Length : 003C
+[063h 0099   1]                     Reserved : 00
+[064h 0100   8]                Block Address : 000000000F120000
+[06Ch 0108   4]                  Timer Count : 00000001
+[070h 0112   4]                 Timer Offset : 00000014
+
+[074h 0116   1]                 Frame Number : 00
+[075h 0117   3]                     Reserved : 000000
+[078h 0120   8]                 Base Address : 000000000F121000
+[080h 0128   8]             EL0 Base Address : 000000000F122000
+[088h 0136   4]              Timer Interrupt : 00000028
+[08Ch 0140   4]  Timer Flags (decoded below) : 00000000
+                                Trigger Mode : 0
+                                    Polarity : 0
+[090h 0144   4]      Virtual Timer Interrupt : 00000027
+[094h 0148   4] Virtual Timer Flags (decoded below) : 00000000
+                                Trigger Mode : 0
+                                    Polarity : 0
+[098h 0152   4] Common Flags (decoded below) : 00000002
+                                      Secure : 0
+                                   Always On : 1
+
+Raw Table Data: Length 156 (0x9C)
+
+    0000: 47 54 44 54 9C 00 00 00 02 1A 51 43 4F 4D 20 20  // GTDT......QCOM  
+    0010: 51 43 4F 4D 45 44 4B 32 60 06 00 00 49 4E 54 4C  // QCOMEDK2`...INTL
+    0020: 25 09 20 20 FF FF FF FF FF FF FF FF 00 00 00 00  // %.  ............
+    0030: 11 00 00 00 00 00 00 00 12 00 00 00 00 00 00 00  // ................
+    0040: 13 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00  // ................
+    0050: FF FF FF FF FF FF FF FF 01 00 00 00 60 00 00 00  // ............`...
+    0060: 00 3C 00 00 00 00 92 17 00 00 00 00 01 00 00 00  // .<..............
+    0070: 14 00 00 00 00 00 00 00 00 10 92 17 00 00 00 00  // ................
+    0080: 00 20 92 17 00 00 00 00 28 00 00 00 00 00 00 00  // . ......(.......
+    0090: 27 00 00 00 00 00 00 00 02 00 00 00              // '...........
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/MADT.aml b/Silicon/Qualcomm/sm6225/AcpiTables/MADT.aml
new file mode 100644
index 0000000000..3dfa41c867
Binary files /dev/null and b/Silicon/Qualcomm/sm6225/AcpiTables/MADT.aml differ
diff --git a/Silicon/Qualcomm/sm6225/AcpiTables/MADT.dsl b/Silicon/Qualcomm/sm6225/AcpiTables/MADT.dsl
new file mode 100644
index 0000000000..4326fc8db1
--- /dev/null
+++ b/Silicon/Qualcomm/sm6225/AcpiTables/MADT.dsl
@@ -0,0 +1,276 @@
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ * 
+ * Disassembly of MADT.aml, Sun Nov 12 22:32:51 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue
+ */
+
+[000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
+[004h 0004   4]                 Table Length : 000002EC
+[008h 0008   1]                     Revision : 05
+[009h 0009   1]                     Checksum : 59
+[00Ah 0010   6]                       Oem ID : "QCOM  "
+[010h 0016   8]                 Oem Table ID : "QCOMEDK2"
+[018h 0024   4]                 Oem Revision : 00000680
+[01Ch 0028   4]              Asl Compiler ID : "INTL"
+[020h 0032   4]        Asl Compiler Revision : 20200925
+
+[024h 0036   4]           Local Apic Address : 0F400000
+[028h 0040   4]        Flags (decoded below) : 00000000
+                         PC-AT Compatibility : 0
+
+[02Ch 0044   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[02Dh 0045   1]                       Length : 50
+[02Eh 0046   2]                     Reserved : 0000
+[030h 0048   4]         CPU Interface Number : 00000000
+[034h 0052   4]                Processor UID : 00000000
+[038h 0056   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[03Ch 0060   4]     Parking Protocol Version : 00000000
+[040h 0064   4]        Performance Interrupt : 00000016
+[044h 0068   8]               Parked Address : 0000000000000000
+[04Ch 0076   8]                 Base Address : 0000000000000000
+[054h 0084   8]     Virtual GIC Base Address : 0000000017C20000
+[05Ch 0092   8]  Hypervisor GIC Base Address : 0000000017C10000
+[064h 0100   4]        Virtual GIC Interrupt : 0000001B
+[068h 0104   8]   Redistributor Base Address : 0000000000000000
+[070h 0112   8]                    ARM MPIDR : 0000000000000000
+[078h 0120   1]             Efficiency Class : 00
+[079h 0121   1]                     Reserved : 00
+[07Ah 0122   2]       SPE Overflow Interrupt : 0000
+
+[07Ch 0124   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[07Dh 0125   1]                       Length : 50
+[07Eh 0126   2]                     Reserved : 0000
+[080h 0128   4]         CPU Interface Number : 00000001
+[084h 0132   4]                Processor UID : 00000001
+[088h 0136   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[08Ch 0140   4]     Parking Protocol Version : 00000000
+[090h 0144   4]        Performance Interrupt : 00000016
+[094h 0148   8]               Parked Address : 0000000000000000
+[09Ch 0156   8]                 Base Address : 0000000000000000
+[0A4h 0164   8]     Virtual GIC Base Address : 0000000017C20000
+[0ACh 0172   8]  Hypervisor GIC Base Address : 0000000017C10000
+[0B4h 0180   4]        Virtual GIC Interrupt : 0000001B
+[0B8h 0184   8]   Redistributor Base Address : 0000000000000000
+[0C0h 0192   8]                    ARM MPIDR : 0000000000000001
+[0C8h 0200   1]             Efficiency Class : 00
+[0C9h 0201   1]                     Reserved : 00
+[0CAh 0202   2]       SPE Overflow Interrupt : 0000
+
+[0CCh 0204   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[0CDh 0205   1]                       Length : 50
+[0CEh 0206   2]                     Reserved : 0000
+[0D0h 0208   4]         CPU Interface Number : 00000002
+[0D4h 0212   4]                Processor UID : 00000002
+[0D8h 0216   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[0DCh 0220   4]     Parking Protocol Version : 00000000
+[0E0h 0224   4]        Performance Interrupt : 00000016
+[0E4h 0228   8]               Parked Address : 0000000000000000
+[0ECh 0236   8]                 Base Address : 0000000000000000
+[0F4h 0244   8]     Virtual GIC Base Address : 0000000017C20000
+[0FCh 0252   8]  Hypervisor GIC Base Address : 0000000017C10000
+[104h 0260   4]        Virtual GIC Interrupt : 0000001B
+[108h 0264   8]   Redistributor Base Address : 0000000000000000
+[110h 0272   8]                    ARM MPIDR : 0000000000000002
+[118h 0280   1]             Efficiency Class : 00
+[119h 0281   1]                     Reserved : 00
+[11Ah 0282   2]       SPE Overflow Interrupt : 0000
+
+[11Ch 0284   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[11Dh 0285   1]                       Length : 50
+[11Eh 0286   2]                     Reserved : 0000
+[120h 0288   4]         CPU Interface Number : 00000003
+[124h 0292   4]                Processor UID : 00000003
+[128h 0296   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[12Ch 0300   4]     Parking Protocol Version : 00000000
+[130h 0304   4]        Performance Interrupt : 00000016
+[134h 0308   8]               Parked Address : 0000000000000000
+[13Ch 0316   8]                 Base Address : 0000000000000000
+[144h 0324   8]     Virtual GIC Base Address : 0000000017C20000
+[14Ch 0332   8]  Hypervisor GIC Base Address : 0000000017C10000
+[154h 0340   4]        Virtual GIC Interrupt : 0000001B
+[158h 0344   8]   Redistributor Base Address : 0000000000000000
+[160h 0352   8]                    ARM MPIDR : 0000000000000003
+[168h 0360   1]             Efficiency Class : 00
+[169h 0361   1]                     Reserved : 00
+[16Ah 0362   2]       SPE Overflow Interrupt : 0000
+
+[16Ch 0364   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[16Dh 0365   1]                       Length : 50
+[16Eh 0366   2]                     Reserved : 0000
+[170h 0368   4]         CPU Interface Number : 00000004
+[174h 0372   4]                Processor UID : 00000004
+[178h 0376   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[17Ch 0380   4]     Parking Protocol Version : 00000000
+[180h 0384   4]        Performance Interrupt : 00000016
+[184h 0388   8]               Parked Address : 0000000000000000
+[18Ch 0396   8]                 Base Address : 0000000000000000
+[194h 0404   8]     Virtual GIC Base Address : 0000000017C20000
+[19Ch 0412   8]  Hypervisor GIC Base Address : 0000000017C10000
+[1A4h 0420   4]        Virtual GIC Interrupt : 0000001B
+[1A8h 0424   8]   Redistributor Base Address : 0000000000000000
+[1B0h 0432   8]                    ARM MPIDR : 0000000000000100
+[1B8h 0440   1]             Efficiency Class : 01
+[1B9h 0441   1]                     Reserved : 00
+[1BAh 0442   2]       SPE Overflow Interrupt : 0000
+
+[1BCh 0444   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[1BDh 0445   1]                       Length : 50
+[1BEh 0446   2]                     Reserved : 0000
+[1C0h 0448   4]         CPU Interface Number : 00000005
+[1C4h 0452   4]                Processor UID : 00000005
+[1C8h 0456   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[1CCh 0460   4]     Parking Protocol Version : 00000000
+[1D0h 0464   4]        Performance Interrupt : 00000016
+[1D4h 0468   8]               Parked Address : 0000000000000000
+[1DCh 0476   8]                 Base Address : 0000000000000000
+[1E4h 0484   8]     Virtual GIC Base Address : 0000000017C20000
+[1ECh 0492   8]  Hypervisor GIC Base Address : 0000000017C10000
+[1F4h 0500   4]        Virtual GIC Interrupt : 0000001B
+[1F8h 0504   8]   Redistributor Base Address : 0000000000000000
+[200h 0512   8]                    ARM MPIDR : 0000000000000101
+[208h 0520   1]             Efficiency Class : 01
+[209h 0521   1]                     Reserved : 00
+[20Ah 0522   2]       SPE Overflow Interrupt : 0000
+
+[20Ch 0524   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[20Dh 0525   1]                       Length : 50
+[20Eh 0526   2]                     Reserved : 0000
+[210h 0528   4]         CPU Interface Number : 00000006
+[214h 0532   4]                Processor UID : 00000006
+[218h 0536   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[21Ch 0540   4]     Parking Protocol Version : 00000000
+[220h 0544   4]        Performance Interrupt : 00000016
+[224h 0548   8]               Parked Address : 0000000000000000
+[22Ch 0556   8]                 Base Address : 0000000000000000
+[234h 0564   8]     Virtual GIC Base Address : 0000000017C20000
+[23Ch 0572   8]  Hypervisor GIC Base Address : 0000000017C10000
+[244h 0580   4]        Virtual GIC Interrupt : 0000001B
+[248h 0584   8]   Redistributor Base Address : 0000000000000000
+[250h 0592   8]                    ARM MPIDR : 0000000000000102
+[258h 0600   1]             Efficiency Class : 01
+[259h 0601   1]                     Reserved : 00
+[25Ah 0602   2]       SPE Overflow Interrupt : 0000
+
+[25Ch 0604   1]                Subtable Type : 0B [Generic Interrupt Controller]
+[25Dh 0605   1]                       Length : 50
+[25Eh 0606   2]                     Reserved : 0000
+[260h 0608   4]         CPU Interface Number : 00000007
+[264h 0612   4]                Processor UID : 00000007
+[268h 0616   4]        Flags (decoded below) : 00000001
+                           Processor Enabled : 1
+          Performance Interrupt Trigger Mode : 0
+          Virtual GIC Interrupt Trigger Mode : 0
+[26Ch 0620   4]     Parking Protocol Version : 00000000
+[270h 0624   4]        Performance Interrupt : 00000016
+[274h 0628   8]               Parked Address : 0000000000000000
+[27Ch 0636   8]                 Base Address : 0000000000000000
+[284h 0644   8]     Virtual GIC Base Address : 0000000017C20000
+[28Ch 0652   8]  Hypervisor GIC Base Address : 0000000017C10000
+[294h 0660   4]        Virtual GIC Interrupt : 0000001B
+[298h 0664   8]   Redistributor Base Address : 0000000000000000
+[2A0h 0672   8]                    ARM MPIDR : 0000000000000103
+[2A8h 0680   1]             Efficiency Class : 01
+[2A9h 0681   1]                     Reserved : 00
+[2AAh 0682   2]       SPE Overflow Interrupt : 0000
+
+[2ACh 0684   1]                Subtable Type : 0C [Generic Interrupt Distributor]
+[2ADh 0685   1]                       Length : 18
+[2AEh 0686   2]                     Reserved : 0000
+[2B0h 0688   4]        Local GIC Hardware ID : 00000000
+[2B4h 0692   8]                 Base Address : 000000000F200000
+[2BCh 0700   4]               Interrupt Base : 00000000
+[2C0h 0704   1]                      Version : 03
+[2C1h 0705   3]                     Reserved : 000000
+
+[2C4h 0708   1]                Subtable Type : 0E [Generic Interrupt Redistributor]
+[2C5h 0709   1]                       Length : 10
+[2C6h 0710   2]                     Reserved : 0000
+[2C8h 0712   8]                 Base Address : 000000000F300000
+[2D0h 0720   4]                       Length : 00100000
+
+[2D4h 0724   1]                Subtable Type : 0D [Generic MSI Frame]
+[2D5h 0725   1]                       Length : 18
+[2D6h 0726   2]                     Reserved : 0000
+[2D8h 0728   4]                 MSI Frame ID : 00000000
+[2DCh 0732   8]                 Base Address : 000000000F210000
+[2E4h 0740   4]        Flags (decoded below) : 00000001
+                                  Select SPI : 1
+[2E8h 0744   2]                    SPI Count : 0020
+[2EAh 0746   2]                     SPI Base : 0200
+
+Raw Table Data: Length 748 (0x2EC)
+
+    0000: 41 50 49 43 EC 02 00 00 05 59 51 43 4F 4D 20 20  // APIC.....YQCOM  
+    0010: 51 43 4F 4D 45 44 4B 32 60 06 00 00 49 4E 54 4C  // QCOMEDK2`...INTL
+    0020: 25 09 20 20 00 00 C0 17 00 00 00 00 0B 50 00 00  // %.  .........P..
+    0030: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00  // ................
+    0040: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0050: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    0060: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0070: 00 00 00 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .............P..
+    0080: 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00  // ................
+    0090: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00A0: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    00B0: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00C0: 01 00 00 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .............P..
+    00D0: 02 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00  // ................
+    00E0: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    00F0: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    0100: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0110: 02 00 00 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .............P..
+    0120: 03 00 00 00 03 00 00 00 01 00 00 00 00 00 00 00  // ................
+    0130: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0140: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    0150: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0160: 03 00 00 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .............P..
+    0170: 04 00 00 00 04 00 00 00 01 00 00 00 00 00 00 00  // ................
+    0180: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0190: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    01A0: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    01B0: 00 01 00 00 00 00 00 00 01 00 00 00 0B 50 00 00  // .............P..
+    01C0: 05 00 00 00 05 00 00 00 01 00 00 00 00 00 00 00  // ................
+    01D0: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    01E0: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    01F0: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0200: 01 01 00 00 00 00 00 00 01 00 00 00 0B 50 00 00  // .............P..
+    0210: 06 00 00 00 06 00 00 00 01 00 00 00 00 00 00 00  // ................
+    0220: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0230: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    0240: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0250: 02 01 00 00 00 00 00 00 01 00 00 00 0B 50 00 00  // .............P..
+    0260: 07 00 00 00 07 00 00 00 01 00 00 00 00 00 00 00  // ................
+    0270: 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
+    0280: 00 00 00 00 00 00 C2 17 00 00 00 00 00 00 C1 17  // ................
+    0290: 00 00 00 00 1B 00 00 00 00 00 00 00 00 00 00 00  // ................
+    02A0: 03 01 00 00 00 00 00 00 01 00 00 00 0C 18 00 00  // ................
+    02B0: 00 00 00 00 00 00 A0 17 00 00 00 00 00 00 00 00  // ................
+    02C0: 03 00 00 00 0E 10 00 00 00 00 B0 17 00 00 00 00  // ................
+    02D0: 00 00 10 00 0D 18 00 00 00 00 00 00 00 00 A1 17  // ................
+    02E0: 00 00 00 00 01 00 00 00 20 00 00 02              // ........ ...