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x393_testbench04.sav
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[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Wed Jul 13 03:31:29 2016
[*]
[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_testbench03-20160708114239115.fst"
[dumpfile_mtime] "Fri Jul 8 17:58:15 2016"
[dumpfile_size] 152636136
[savefile] "/home/eyesis/git/x393-neon/x393_testbench04.sav"
[timestart] 44643100
[size] 1836 1171
[pos] 0 24
*-17.551579 45052388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_testbench03.
[treeopen] x393_testbench03.read_compressor_frame_irq.
[treeopen] x393_testbench03.read_contol_register_irq.
[treeopen] x393_testbench03.read_status_irq.
[treeopen] x393_testbench03.simul_axi_hp_wr_i.
[treeopen] x393_testbench03.x393_i.
[treeopen] x393_testbench03.x393_i.cmd_mux_i.
[treeopen] x393_testbench03.x393_i.cmd_seq_mux_i.status_generate_cmd_seq_mux_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_reorder_in_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_stage1_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_stage1_i.dsp_addsub_simd1_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_stage1_i.dsp_addsub_simd1_i.DSP48E1_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_stage1_i.dsp_ma1_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_stage1_i.dsp_ma1_i.DSP48E1_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_stage1_i.dsp_ma2_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct1d_chen_stage1_i.dsp_ma2_i.DSP48E1_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct2d8x8_chen_i.dct_chen_transpose_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_macroblock_buf_iface_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.dct2d8x8_chen_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.dct2d8x8_chen_i.dct_chen_transpose_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.status_generate0_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.status_generate0_i.genblk2.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.status_generate1_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.status_generate1_i.genblk2.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.status_generate1_i.genblk2.status_generate_only_i.
[treeopen] x393_testbench03.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.
[treeopen] x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.
[treeopen] x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.
[treeopen] x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.
[treeopen] x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.byte_lane0_i.
[treeopen] x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.byte_lane0_i.dqs_i.
[treeopen] x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.cmd_addr_i.cmda_cke_i.
[treeopen] x393_testbench03.x393_i.mcntrl393_i.sens_comp_block[0].
[treeopen] x393_testbench03.x393_i.sensors393_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.hispi_lane[0].
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.sens_hispi_clock_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sensor_i2c_io_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sensor_i2c_io_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_membuf_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sensor_i2c_io_i.
[treeopen] x393_testbench03.x393_i.sync_resets_i.
[treeopen] x393_testbench03.x393_i.sync_resets_i.rst_block[5].
[treeopen] x393_testbench03.x393_i.sync_resets_i.rst_block[5].level_cross_clocks_rst_i.
[treeopen] x393_testbench03.x393_i.sync_resets_i.rst_block[5].level_cross_clocks_rst_i.level_cross_clock_block[0].
[sst_width] 454
[signals_width] 418
[sst_expanded] 1
[sst_vpaned_height] 642
@820
x393_testbench03.TEST_TITLE[639:0]
@28
x393_testbench03.CLK
x393_testbench03.x393_i.axi_aclk
x393_testbench03.x393_i.ps7_i.MAXIGP0ARESETN
x393_testbench03.x393_i.ps7_i.MAXIGP0ARLOCK[1:0]
@22
x393_testbench03.x393_i.ps7_i.MAXIGP0ARQOS[3:0]
@28
x393_testbench03.AR_SET_CMD
x393_testbench03.AR_READY
x393_testbench03.ARSIZE_IN_r[1:0]
@c00200
-memory_timing
@22
x393_testbench03.x393_i.cmd_mux_i.waddr[13:0]
x393_testbench03.x393_i.cmd_mux_i.wdata[31:0]
@28
x393_testbench03.x393_i.cmd_mux_i.wr_en
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.rst_in
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.mrst
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.rst
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.dci_rst
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr_rst
@22
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.dly_addr[6:0]
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.dly_data[7:0]
@28
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ld_delay
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ld_mmcm
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.mmcm_phase_cntr_i.ps_start0
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.mmcm_phase_cntr_i.ps_start
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ps_rdy
@22
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ps_out[7:0]
@28
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.set
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.locked_mmcm
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.locked_pll
@200
-
@c00022
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
@28
(0)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
(1)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
(2)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
(3)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
(4)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
(5)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
(6)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
(7)x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.din_dqs[7:0]
@1401200
-group_end
@22
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.byte_lane0_i.dqs_i.dly_data[7:0]
@28
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.byte_lane0_i.dqs_i.set_idelay
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.byte_lane0_i.dqs_i.set_odelay
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.byte_lane0_i.dqs_i.ld_odelay
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.byte_lane0_i.dqs_i.ld_idelay
@22
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.dq[15:0]
@28
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.dqsl
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.dqsu
@22
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_a[14:0]
@28
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_ba[2:0]
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_cas
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_cke
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_clk
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_nclk
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_nrst
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_odt
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_ras
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr3_we
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.ddr_rst
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.sdclk_pre
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.sdclk
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.cmd_addr_i.cmda_cke_i.clk
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.cmd_addr_i.cmda_cke_i.clk_div
x393_testbench03.x393_i.mclk
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.cmd_addr_i.in_cke_r[1:0]
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.cmd_addr_i.cmda_cke_i.dq
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.ld_delay
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.ld_delay
@22
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.cmd_ad[7:0]
@28
x393_testbench03.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.cmd_stb
@200
-
@1401200
-memory_timing
@c00200
-resets
@28
x393_testbench03.x393_i.axi_rst_pre
@800022
x393_testbench03.x393_i.sync_resets_i.locked[6:0]
@28
(0)x393_testbench03.x393_i.sync_resets_i.locked[6:0]
(1)x393_testbench03.x393_i.sync_resets_i.locked[6:0]
(2)x393_testbench03.x393_i.sync_resets_i.locked[6:0]
(3)x393_testbench03.x393_i.sync_resets_i.locked[6:0]
(4)x393_testbench03.x393_i.sync_resets_i.locked[6:0]
(5)x393_testbench03.x393_i.sync_resets_i.locked[6:0]
(6)x393_testbench03.x393_i.sync_resets_i.locked[6:0]
@1001200
-group_end
@800022
x393_testbench03.x393_i.sync_resets_i.clk[6:0]
@28
(0)x393_testbench03.x393_i.sync_resets_i.clk[6:0]
(1)x393_testbench03.x393_i.sync_resets_i.clk[6:0]
(2)x393_testbench03.x393_i.sync_resets_i.clk[6:0]
(3)x393_testbench03.x393_i.sync_resets_i.clk[6:0]
(4)x393_testbench03.x393_i.sync_resets_i.clk[6:0]
(5)x393_testbench03.x393_i.sync_resets_i.clk[6:0]
(6)x393_testbench03.x393_i.sync_resets_i.clk[6:0]
@1001200
-group_end
@800022
x393_testbench03.x393_i.sync_resets_i.rst[6:0]
@28
(0)x393_testbench03.x393_i.sync_resets_i.rst[6:0]
(1)x393_testbench03.x393_i.sync_resets_i.rst[6:0]
(2)x393_testbench03.x393_i.sync_resets_i.rst[6:0]
(3)x393_testbench03.x393_i.sync_resets_i.rst[6:0]
(4)x393_testbench03.x393_i.sync_resets_i.rst[6:0]
(5)x393_testbench03.x393_i.sync_resets_i.rst[6:0]
(6)x393_testbench03.x393_i.sync_resets_i.rst[6:0]
x393_testbench03.x393_i.sync_resets_i.mrst
x393_testbench03.x393_i.sync_resets_i.rst_early_master
x393_testbench03.x393_i.sync_resets_i.rst_early_master_w
x393_testbench03.x393_i.sync_resets_i.en_locked
@c00022
x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
@28
(0)x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
(1)x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
(2)x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
(3)x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
(4)x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
(5)x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
(6)x393_testbench03.x393_i.sync_resets_i.rst_w[6:0]
@1401200
-group_end
@1001200
-group_end
@200
-
@28
x393_testbench03.x393_i.sync_resets_i.rst_block[5].level_cross_clocks_rst_i.d_in
x393_testbench03.x393_i.sync_resets_i.rst_block[5].level_cross_clocks_rst_i.d_out
@1401200
-resets
@800200
-sensor_hispi
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.data_r[31:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.set_fifo_dly
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.set_idelays
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.ld_idelay
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.set_lanes_map
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.set_iclk_phase
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.rst_mmcm
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.lanes_map[7:0]
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.fifo_out_dly_mclk[3:0]
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.sens_hispi_clock_i.phase[7:0]
@29
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.sens_hispi_clock_i.set_phase
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_10398_i.sens_hispi12l4_i.sens_hispi_clock_i.ps_out[7:0]
@200
-
@800200
-chn1
@22
x393_testbench03.PX1_D[11:0]
@28
x393_testbench03.PX1_HACT
x393_testbench03.PX1_VACT
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sns_dp[3:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.pclk
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.pxd[11:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sof
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.eof
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.hact
@1000200
-chn1
@800200
-sensor_memory
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_membuf_i.mclk
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_membuf_i.buf_dout[63:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_membuf_i.buf_rd
x393_testbench03.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.cmd_we
@22
x393_testbench03.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.cmd_a[3:0]
x393_testbench03.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.cmd_data[31:0]
@200
-
@1000200
-sensor_memory
@c00200
-chn2
@22
x393_testbench03.PX2_D[11:0]
@28
x393_testbench03.PX2_HACT
x393_testbench03.PX2_VACT
@1401200
-chn2
@c00200
-chn3
@22
x393_testbench03.PX3_D[11:0]
@28
x393_testbench03.PX3_HACT
x393_testbench03.PX3_VACT
@1401200
-chn3
@c00200
-chn4
@22
x393_testbench03.PX4_D[11:0]
@28
x393_testbench03.PX4_HACT
x393_testbench03.PX4_VACT
@1401200
-chn4
@200
-
@1000200
-sensor_hispi
@800200
-compressor_channel0
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.mclk
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_din[63:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_we
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_ra[11:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_pxd[7:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_rd[1:0]
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.signed_y[8:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.signed_c[8:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.ywe
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cwe
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.yc_nodc[9:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.yc_avr[8:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct_start
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct_pre_first_out
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.dct_out[12:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.quant_do[12:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.quant_ds
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.focus_do[12:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.focus_ds
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.first_block_quant
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.enc_do[15:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.enc_dv
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.stuffer_do[31:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.stuffer_dv
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_out_fifo_i.wdata[31:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.stuffer_done
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.fifo_rst
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.fifo_ren
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.fifo_rdata[63:0]
@8022
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.fifo_count[7:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.hclk
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.hrst
@1000200
-compressor_channel0
@c00200
-afi0_mux
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmd_we
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmd_a[3:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmd_data[31:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awaddr[31:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awburst[1:0]
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awcache[3:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awid[5:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awid_r[5:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awlen[3:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awlock[1:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awprot[2:0]
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awqos[3:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awready
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awsize[1:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_awvalid
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_bid[5:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_bready
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_bresp[1:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_bvalid
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wacount[5:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wcount[7:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wdata[63:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wid[5:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wlast
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wready
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wrissuecap1en
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wstrb[7:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.afi_wvalid
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.awvalid[1:0]
@200
-
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.pre_busy_w
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.busy[3:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.ready_to_start
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.ptr_resetting
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.need_to_bother
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.counts_corr2[8:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.counts_corr1[17:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.counts_corr0[35:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.fifo_count0[7:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.en_chn[3:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.ren_suspend_flush[3:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.fifo_ren0
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.fifo_flush0
@8022
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.fifo_count0[7:0]
@1401200
-afi0_mux
@800200
-simul_axi_hp1_wr
@200
-
@22
x393_testbench03.simul_axi_hp1_wr_i.sim_bresp_latency[3:0]
x393_testbench03.simul_axi_hp1_wr_i.sim_wid[5:0]
x393_testbench03.simul_axi_hp1_wr_i.sim_wr_address[31:0]
@28
x393_testbench03.simul_axi_hp1_wr_i.sim_wr_cap[2:0]
@22
x393_testbench03.simul_axi_hp1_wr_i.sim_wr_data[63:0]
x393_testbench03.simul_axi_hp1_wr_i.sim_wr_qos[3:0]
@28
x393_testbench03.simul_axi_hp1_wr_i.sim_wr_ready
@22
x393_testbench03.simul_axi_hp1_wr_i.sim_wr_stb[7:0]
@28
x393_testbench03.simul_axi_hp1_wr_i.sim_wr_valid
@1000200
-simul_axi_hp1_wr
@800200
-sim_afi1
@22
x393_testbench03.sim_cmprs0_addr[31:0]
x393_testbench03.sim_cmprs0_data[63:0]
x393_testbench03.sim_cmprs1_addr[31:0]
x393_testbench03.sim_cmprs1_data[63:0]
x393_testbench03.sim_cmprs2_addr[31:0]
x393_testbench03.sim_cmprs2_data[63:0]
x393_testbench03.sim_cmprs3_addr[31:0]
x393_testbench03.sim_cmprs3_data[63:0]
@1000200
-sim_afi1
@c00200
-all_cmprs_out
@28
x393_testbench03.x393_i.hclk
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.fifo_eof
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.fifo_rdata[63:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.fifo_ren
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.fifo_eof
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.fifo_rdata[63:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.fifo_ren
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.fifo_eof
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.fifo_rdata[63:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.fifo_ren
@200
-
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.fifo_eof
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.fifo_rdata[63:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.fifo_ren
@22
x393_testbench03.setup_sensor_channel.num_sensor[1:0]
x393_testbench03.setup_compressor_channel.num_sensor[1:0]
x393_testbench03.setup_compressor_channel.qbank[31:0]
@200
-
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_qpage[2:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_qpage[2:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.cmprs_qpage[2:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.cmprs_qpage[2:0]
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.bayer_phase[1:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.bayer_phase[1:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.bayer_phase[1:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.bayer_phase[1:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.coring_num[2:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmd_we
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmd_a[2:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmd_data[31:0]
x393_testbench03.x393_i.compressor393_i.fifo_ren[3:0]
x393_testbench03.x393_i.compressor393_i.fifo_rdata[255:0]
@c00022
x393_testbench03.x393_i.compressor393_i.fifo_eof[3:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.fifo_eof[3:0]
(1)x393_testbench03.x393_i.compressor393_i.fifo_eof[3:0]
(2)x393_testbench03.x393_i.compressor393_i.fifo_eof[3:0]
(3)x393_testbench03.x393_i.compressor393_i.fifo_eof[3:0]
@1401200
-group_end
@800022
x393_testbench03.x393_i.compressor393_i.frame_start_dst[3:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.frame_start_dst[3:0]
(1)x393_testbench03.x393_i.compressor393_i.frame_start_dst[3:0]
(2)x393_testbench03.x393_i.compressor393_i.frame_start_dst[3:0]
(3)x393_testbench03.x393_i.compressor393_i.frame_start_dst[3:0]
@c00022
x393_testbench03.x393_i.compressor393_i.eof_written[3:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.eof_written[3:0]
(1)x393_testbench03.x393_i.compressor393_i.eof_written[3:0]
(2)x393_testbench03.x393_i.compressor393_i.eof_written[3:0]
(3)x393_testbench03.x393_i.compressor393_i.eof_written[3:0]
@1401200
-group_end
@28
x393_testbench03.RST_CLEAN
@1001200
-group_end
@800022
x393_testbench03.CAPTURE_COMPRESSORS[3:0]
@28
(0)x393_testbench03.CAPTURE_COMPRESSORS[3:0]
(1)x393_testbench03.CAPTURE_COMPRESSORS[3:0]
(2)x393_testbench03.CAPTURE_COMPRESSORS[3:0]
(3)x393_testbench03.CAPTURE_COMPRESSORS[3:0]
@1001200
-group_end
@800022
x393_testbench03.CAPTURED_COMPRESSORS[3:0]
@28
(0)x393_testbench03.CAPTURED_COMPRESSORS[3:0]
(1)x393_testbench03.CAPTURED_COMPRESSORS[3:0]
(2)x393_testbench03.CAPTURED_COMPRESSORS[3:0]
(3)x393_testbench03.CAPTURED_COMPRESSORS[3:0]
@1001200
-group_end
@200
-
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.left_marg[4:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.left_marg[4:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.left_marg[4:0]
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.left_marg[4:0]
@c00200
-status
@800022
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.chunk_ptr_ra[3:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.chunk_ptr_ra[3:0]
(1)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.chunk_ptr_ra[3:0]
(2)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.chunk_ptr_ra[3:0]
(3)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.chunk_ptr_ra[3:0]
@1001200
-group_end
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.chunk_ptr_rd[25:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.status_rq
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_status_i.status_start
@1401200
-status
@c00022
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(1)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(2)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(3)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(4)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(5)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(6)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(7)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(8)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(9)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(10)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(11)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(12)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(13)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(14)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(15)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(16)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(17)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(18)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(19)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(20)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(21)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(22)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(23)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(24)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(25)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
(26)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_i.chunk_ptr_rd[26:0]
@1401200
-group_end
@c00022
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(1)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(2)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(3)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(4)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(5)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(6)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(7)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(8)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(9)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(10)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(11)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(12)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(13)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(14)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(15)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(16)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(17)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(18)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(19)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(20)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(21)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(22)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(23)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(24)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(25)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
(26)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.chunk_ptr_rd[26:0]
@1401200
-group_end
-all_cmprs_out
@c00200
-sim_soc_interrupts
@28
x393_testbench03.sim_soc_interrupts_i.rst
x393_testbench03.sim_soc_interrupts_i.clk
@c00022
x393_testbench03.sim_soc_interrupts_i.irq[8:0]
@28
(0)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(1)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(2)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(3)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(4)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(5)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(6)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(7)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
(8)x393_testbench03.sim_soc_interrupts_i.irq[8:0]
@1401200
-group_end
@c00022
x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
@28
(0)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(1)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(2)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(3)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(4)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(5)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(6)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(7)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
(8)x393_testbench03.sim_soc_interrupts_i.irqs[8:0]
@1401200
-group_end
@c00022
x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
@28
(0)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(1)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(2)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(3)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(4)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(5)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(6)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(7)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(8)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
@1401200
-group_end
@c00022
x393_testbench03.sim_soc_interrupts_i.inta[8:0]
@28
(0)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(1)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(2)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(3)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(4)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(5)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(6)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(7)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
(8)x393_testbench03.sim_soc_interrupts_i.inta[8:0]
@1401200
-group_end
@200
-
@1401200
-sim_soc_interrupts
@c00200
-interrupts
@28
x393_testbench03.MAIN_GO
x393_testbench03.IRQS
x393_testbench03.IRQ_EN
@22
x393_testbench03.IRQ_M[8:0]
@c00022
x393_testbench03.IRQ_R[8:0]
@28
(0)x393_testbench03.IRQ_R[8:0]
(1)x393_testbench03.IRQ_R[8:0]
(2)x393_testbench03.IRQ_R[8:0]
(3)x393_testbench03.IRQ_R[8:0]
(4)x393_testbench03.IRQ_R[8:0]
(5)x393_testbench03.IRQ_R[8:0]
(6)x393_testbench03.IRQ_R[8:0]
(7)x393_testbench03.IRQ_R[8:0]
(8)x393_testbench03.IRQ_R[8:0]
@1401200
-group_end
@800022
x393_testbench03.IRQ_S[8:0]
@28
(0)x393_testbench03.IRQ_S[8:0]
(1)x393_testbench03.IRQ_S[8:0]
(2)x393_testbench03.IRQ_S[8:0]
(3)x393_testbench03.IRQ_S[8:0]
(4)x393_testbench03.IRQ_S[8:0]
(5)x393_testbench03.IRQ_S[8:0]
(6)x393_testbench03.IRQ_S[8:0]
(7)x393_testbench03.IRQ_S[8:0]
(8)x393_testbench03.IRQ_S[8:0]
@1001200
-group_end
@800022
x393_testbench03.IRQ_ACKN[8:0]
@28
(0)x393_testbench03.IRQ_ACKN[8:0]
(1)x393_testbench03.IRQ_ACKN[8:0]
(2)x393_testbench03.IRQ_ACKN[8:0]
(3)x393_testbench03.IRQ_ACKN[8:0]
(4)x393_testbench03.IRQ_ACKN[8:0]
(5)x393_testbench03.IRQ_ACKN[8:0]
(6)x393_testbench03.IRQ_ACKN[8:0]
(7)x393_testbench03.IRQ_ACKN[8:0]
(8)x393_testbench03.IRQ_ACKN[8:0]
@1001200
-group_end
@22
x393_testbench03.IRQ_SEQUENCER_FRAME_0[3:0]
x393_testbench03.IRQ_SEQUENCER_FRAME_1[3:0]
x393_testbench03.IRQ_SEQUENCER_FRAME_2[3:0]
x393_testbench03.IRQ_SEQUENCER_FRAME_3[3:0]
x393_testbench03.IRQ_CMPRS_FRAME_0[3:0]
x393_testbench03.IRQ_CMPRS_FRAME_1[3:0]
x393_testbench03.IRQ_CMPRS_FRAME_2[3:0]
x393_testbench03.IRQ_CMPRS_FRAME_3[3:0]
@c00022
x393_testbench03.IRQ_CMPRS_S[3:0]
@28
(0)x393_testbench03.IRQ_CMPRS_S[3:0]
(1)x393_testbench03.IRQ_CMPRS_S[3:0]
(2)x393_testbench03.IRQ_CMPRS_S[3:0]
(3)x393_testbench03.IRQ_CMPRS_S[3:0]
@1401200
-group_end
@22
x393_testbench03.IRQ_CMPRS_DONE[3:0]
x393_testbench03.IRQ_FRSEQ_DONE[3:0]
@28
x393_testbench03.CLK
@22
x393_testbench03.IRQ_CMPRS_POINTER_0[25:0]
x393_testbench03.IRQ_CMPRS_POINTER_1[25:0]
x393_testbench03.IRQ_CMPRS_POINTER_2[25:0]
x393_testbench03.IRQ_CMPRS_POINTER_3[25:0]
x393_testbench03.IRQ_CMPRS_DONE[3:0]
@28
x393_testbench03.sim_soc_interrupts_i.clk
@c00022
x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
@28
(0)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(1)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(2)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(3)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(4)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(5)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(6)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(7)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
(8)x393_testbench03.sim_soc_interrupts_i.irqs_pri_w[8:0]
@1401200
-group_end
@c00022
x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
@28
(0)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(1)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(2)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(3)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(4)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(5)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(6)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(7)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
(8)x393_testbench03.sim_soc_interrupts_i.inta_r[8:0]
@1401200
-group_end
@800022
x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
@28
(0)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(1)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(2)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(3)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(4)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(5)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(6)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(7)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
(8)x393_testbench03.sim_soc_interrupts_i.irq_done[8:0]
@1001200
-group_end
@800200
-read_status_irq
@28
x393_testbench03.CLK
@c00200
-read_sequencer_frame
@22
x393_testbench03.read_sequencer_frame_irq.chn[1:0]
x393_testbench03.read_sequencer_frame_irq.rdata[31:0]
x393_testbench03.read_sequencer_frame_irq.frame[3:0]
@1401200
-read_sequencer_frame
@800200
-read_compressor_frame
@22
x393_testbench03.read_compressor_frame_irq.chn[1:0]
x393_testbench03.read_compressor_frame_irq.frame[3:0]
x393_testbench03.read_compressor_frame_irq.rdata[31:0]
@1000200
-read_compressor_frame
@800200
-read_compressor_pointer
@22
x393_testbench03.read_compressor_pointer_irq.chn[1:0]
x393_testbench03.read_compressor_pointer_irq.pointer[25:0]
x393_testbench03.read_compressor_pointer_irq.rdata[31:0]
@1000200
-read_compressor_pointer
@22
x393_testbench03.read_status_irq.address[7:0]
@c00022
x393_testbench03.read_status_irq.rslt[31:0]
@28
(0)x393_testbench03.read_status_irq.rslt[31:0]
(1)x393_testbench03.read_status_irq.rslt[31:0]
(2)x393_testbench03.read_status_irq.rslt[31:0]
(3)x393_testbench03.read_status_irq.rslt[31:0]
(4)x393_testbench03.read_status_irq.rslt[31:0]
(5)x393_testbench03.read_status_irq.rslt[31:0]
(6)x393_testbench03.read_status_irq.rslt[31:0]
(7)x393_testbench03.read_status_irq.rslt[31:0]
(8)x393_testbench03.read_status_irq.rslt[31:0]
(9)x393_testbench03.read_status_irq.rslt[31:0]
(10)x393_testbench03.read_status_irq.rslt[31:0]
(11)x393_testbench03.read_status_irq.rslt[31:0]
(12)x393_testbench03.read_status_irq.rslt[31:0]
(13)x393_testbench03.read_status_irq.rslt[31:0]
(14)x393_testbench03.read_status_irq.rslt[31:0]
(15)x393_testbench03.read_status_irq.rslt[31:0]
(16)x393_testbench03.read_status_irq.rslt[31:0]
(17)x393_testbench03.read_status_irq.rslt[31:0]
(18)x393_testbench03.read_status_irq.rslt[31:0]
(19)x393_testbench03.read_status_irq.rslt[31:0]
(20)x393_testbench03.read_status_irq.rslt[31:0]
(21)x393_testbench03.read_status_irq.rslt[31:0]
(22)x393_testbench03.read_status_irq.rslt[31:0]
(23)x393_testbench03.read_status_irq.rslt[31:0]
(24)x393_testbench03.read_status_irq.rslt[31:0]
(25)x393_testbench03.read_status_irq.rslt[31:0]
(26)x393_testbench03.read_status_irq.rslt[31:0]
(27)x393_testbench03.read_status_irq.rslt[31:0]
(28)x393_testbench03.read_status_irq.rslt[31:0]
(29)x393_testbench03.read_status_irq.rslt[31:0]
(30)x393_testbench03.read_status_irq.rslt[31:0]
(31)x393_testbench03.read_status_irq.rslt[31:0]
@1401200
-group_end
@200
-read_and_wait_w_irq
@22
x393_testbench03.read_and_wait_w_irq.address[29:0]
x393_testbench03.read_and_wait_w_irq.rslt[31:0]
@200
-read_and_wait_irq
@22
x393_testbench03.read_and_wait_irq.address[31:0]
x393_testbench03.read_and_wait_irq.rslt[31:0]
x393_testbench03.GLOBAL_READ_ID[11:0]
@28
x393_testbench03.IRQS
@22
x393_testbench03.araddr[31:0]
@28
x393_testbench03.arvalid
@22
x393_testbench03.rdata[31:0]
@28
x393_testbench03.rvalid
@200
-x393
@c00200
-status_root
@28
x393_testbench03.x393_i.status_root_start
@22
x393_testbench03.x393_i.status_root_ad[7:0]
@28
x393_testbench03.x393_i.status_root_rq
@1401200
-status_root
@c00200
-status_gstatus_sequencer
@22
x393_testbench03.x393_i.status_sequencer_ad[7:0]
@28
x393_testbench03.x393_i.status_sequencer_rq
x393_testbench03.x393_i.status_sequencer_start
@1401200
-status_gstatus_sequencer
@800200
-status_compressor
@22
x393_testbench03.x393_i.status_compressor_ad[7:0]
@28
x393_testbench03.x393_i.status_compressor_rq
x393_testbench03.x393_i.status_compressor_start
@800200
-mux
@22
x393_testbench03.x393_i.compressor393_i.status_ad_mux[47:0]
@28
x393_testbench03.x393_i.compressor393_i.status_rq
@c00022
x393_testbench03.x393_i.compressor393_i.status_rq_mux[5:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.status_rq_mux[5:0]
(1)x393_testbench03.x393_i.compressor393_i.status_rq_mux[5:0]
(2)x393_testbench03.x393_i.compressor393_i.status_rq_mux[5:0]
(3)x393_testbench03.x393_i.compressor393_i.status_rq_mux[5:0]
(4)x393_testbench03.x393_i.compressor393_i.status_rq_mux[5:0]
(5)x393_testbench03.x393_i.compressor393_i.status_rq_mux[5:0]
@1401200
-group_end
@28
x393_testbench03.x393_i.compressor393_i.status_start
@c00200
-chn0
@22
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.status_ad[7:0]
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.status_rq